diff options
| author | Abel Vesa <abel.vesa@nxp.com> | 2018-08-02 19:04:06 +0300 |
|---|---|---|
| committer | Teo Hall <teo.hall@nxp.com> | 2018-08-09 15:18:01 -0500 |
| commit | b829de8c296abb30b3bc83750192465faa22ea51 (patch) | |
| tree | 39cba4d52966e2ac0c1f21015cfdd255488faba6 /include/configs | |
| parent | 30ac9734f6f20da2d3a3a5ff53da0240884855c7 (diff) | |
MLK-19183-3 iMX8QXP SPL: include/configs: imx8qxp_mek: Add SPL build configs
This adds all the configs necessary for when CONFIG_SPL_BUILD is set.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/imx8qxp_mek.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index c6972c8966..3721293836 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -12,6 +12,45 @@ #include "imx_env.h" +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_TEXT_BASE 0x0 +#define CONFIG_SPL_MAX_SIZE (124 * 1024) +#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x1040 /* (32K + 2Mb)/sector_size */ +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0 + + +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x013E000 +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_BSS_START_ADDR 0x00128000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ +#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_MALLOC_F_ADDR 0x00120000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ + +#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE + +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ + +#define CONFIG_OF_EMBED +#define CONFIG_ATF_TEXT_BASE 0x80000000 +#define CONFIG_SYS_ATF_START 0x80000000 +/* #define CONFIG_FIT */ + +/* Since the SPL runs before ATF, MU1 will not be started yet, so use MU0 */ +#define SC_IPC_CH SC_IPC_AP_CH0 + +#endif + #define CONFIG_REMAKE_ELF #define CONFIG_BOARD_EARLY_INIT_F |