diff options
| author | Ye Li <ye.li@nxp.com> | 2018-10-31 20:15:58 -0700 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@nxp.com> | 2018-11-02 20:50:09 -0500 |
| commit | aa4fea4f39d0c834a01b9261a6d64f3b5f600b7b (patch) | |
| tree | 29c7c73f14f1ebd8d8c9fb1386503b6bb9dd71ef /include/configs | |
| parent | 04b813d4687028ce65c9772029d5da5500ec2e1c (diff) | |
MLK-20154-2 imx8mm_ddr3l_val: Add SPI NOR support
iMX8MM DDR3L validation board uses FPGA to link with SPI NOR flash
on ECSPI1 port. Update the codes and configurations to enable the
ECSPI1 to access SPI NOR in u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/imx8mm_val.h | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/include/configs/imx8mm_val.h b/include/configs/imx8mm_val.h index 70ea8527f2..f1c9122cc9 100644 --- a/include/configs/imx8mm_val.h +++ b/include/configs/imx8mm_val.h @@ -265,17 +265,11 @@ #endif /* Enable SPI */ -#ifndef CONFIG_NAND_MXS -#ifndef CONFIG_FSL_FSPI -#ifdef CONFIG_CMD_SF -#define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_MXC_SPI -#define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_SPEED 20000000 -#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) -#endif -#endif +#ifdef CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 8000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) #endif #ifdef CONFIG_CMD_NAND |