diff options
| author | Marek Vasut <marek.vasut@gmail.com> | 2011-10-31 14:17:21 +0100 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-12-06 23:59:32 +0100 |
| commit | 411b9eaf554225c12ca253473002d0381cfec4ff (patch) | |
| tree | 739046e4ca2b76a80eb57370c7230f26fb997fa4 /include/configs/vpac270.h | |
| parent | 496471df9e8a4216386d4e43b95e531f0ca7f140 (diff) | |
PXA: Adapt Voipac PXA270 to OneNAND SPL
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
V2: Add missing u-boot-spl.lds, convert bitshifts to division,
convert to spl_onenand_load_image()
Diffstat (limited to 'include/configs/vpac270.h')
| -rw-r--r-- | include/configs/vpac270.h | 25 |
1 files changed, 20 insertions, 5 deletions
diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index dd68c66dfa3..8accebfce95 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -27,7 +27,17 @@ */ #define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */ #define CONFIG_VPAC270 1 /* Voipac PXA270 board */ -#define CONFIG_SYS_TEXT_BASE 0x0 +#define CONFIG_SYS_TEXT_BASE 0xa0000000 + +#ifdef CONFIG_ONENAND +#define CONFIG_SPL +#define CONFIG_SPL_ONENAND_SUPPORT +#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x2000 +#define CONFIG_SPL_ONENAND_LOAD_SIZE \ + (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR) +#define CONFIG_SPL_TEXT_BASE 0x5c000000 +#define CONFIG_SPL_LDSCRIPT "board/vpac270/u-boot-spl.lds" +#endif /* * Environment settings @@ -46,12 +56,19 @@ "bootm 0xa4000000; " \ "fi; " \ "bootm 0x60000;" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "update_onenand=" \ + "onenand erase 0x0 0x80000 ; " \ + "onenand write 0xa0000000 0x0 0x80000" + #define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200" #define CONFIG_TIMESTAMP #define CONFIG_BOOTDELAY 2 /* Autoboot delay */ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_LZMA /* LZMA compression support */ +#define CONFIG_OF_LIBFDT /* * Serial Console Configuration @@ -180,16 +197,14 @@ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 -#define CONFIG_SYS_IPL_LOAD_ADDR (0x5c000000) #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR \ - (PHYS_SDRAM_1 + GENERATED_GBL_DATA_SIZE + 2048) +#define CONFIG_SYS_INIT_SP_ADDR 0x5c010000 /* * NOR FLASH */ #define CONFIG_SYS_MONITOR_BASE 0x0 -#define CONFIG_SYS_MONITOR_LEN 0x40000 +#define CONFIG_SYS_MONITOR_LEN 0x80000 #define CONFIG_ENV_ADDR \ (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) #define CONFIG_ENV_SIZE 0x4000 |