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authorLey Foon Tan <ley.foon.tan@intel.com>2019-05-06 09:56:01 +0800
committerMarek Vasut <marex@denx.de>2019-05-06 12:44:17 +0200
commit6bf238a46192bf9164da4548178d657dde4e1c96 (patch)
tree0913f06b09797e4ac3bcd228004b53a89826295e /include/configs/socfpga_stratix10_socdk.h
parentbc179908769637cb800ad8c111290e7cae6ead79 (diff)
arm: socfpga: Move Stratix 10 SDRAM driver to DM
Convert Stratix 10 SDRAM driver to device model. Get rid of call to socfpga_per_reset() and use reset framework. SPL is changed from calling function in SDRAM driver directly to just probing UCLASS_RAM. Move sdram_s10.h from arch to driver/ddr/altera directory. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'include/configs/socfpga_stratix10_socdk.h')
-rw-r--r--include/configs/socfpga_stratix10_socdk.h5
1 files changed, 0 insertions, 5 deletions
diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h
index b8a86f2cb2..8d2971c6e2 100644
--- a/include/configs/socfpga_stratix10_socdk.h
+++ b/include/configs/socfpga_stratix10_socdk.h
@@ -130,11 +130,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE - 0x200000
/*
- * SDRAM controller
- */
-#define CONFIG_SPL_ALTERA_SDRAM
-
-/*
* Serial / UART configurations
*/
#define CONFIG_SYS_NS16550_CLK 100000000