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authorVignesh R <vigneshr@ti.com>2018-01-24 10:44:06 +0530
committerJagan Teki <jagan@amarulasolutions.com>2018-01-24 12:11:36 +0530
commita743e2ba3837db5e8499b03f0f57c3610d03a570 (patch)
tree997cfe2c86fac6eef10c3af4a3d735ddfb354c33 /include/configs/socfpga_common.h
parent948ad4f07598a729a0de523ed3d779115b2fa2f2 (diff)
Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible"
This reverts commit 57897c13de03ac0136d64641a3eab526c6810387. Using bounce_buf.c to handle non-DMA alignment problems is bad as bounce_buf.c does cache manipulations which is not required. Therefore revert this patch in favour of local bounce buffer solution in the next patch. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Reviewed-by: Jason Rush <jarush@gmail.com> Acked-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'include/configs/socfpga_common.h')
-rw-r--r--include/configs/socfpga_common.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index ec8bb50050..f6607b101e 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -184,7 +184,6 @@ unsigned int cm_get_l4_sp_clk_hz(void);
unsigned int cm_get_qspi_controller_clk_hz(void);
#define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz()
#endif
-#define CONFIG_BOUNCE_BUFFER
/*
* Designware SPI support