diff options
author | Tom Warren <twarren@nvidia.com> | 2011-05-20 09:30:56 -0700 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2011-08-24 10:01:50 -0700 |
commit | 4b8e97ff8a990b1654097d5a8a5410c94e6386ed (patch) | |
tree | f92328c833ac89d4a4f0da13bf10ffd206d1834c /include/configs/seaboard.h | |
parent | 0b0857e615397e4bddc71b889f930664f423fb3d (diff) |
mmc: Tegra2: add SD/MMC support for Seaboard
SD cards in the RH slot (SDMMC3 controller) are seen OK
internel eMMC chip (SDMMC4 controller) is seen OK
ext2ls/ext2load work, fatls/fatinfo work, mmc cmds work (read, info, etc.)
Card detect for SDIO3 on Seaboard is in place, but not called anywhere.
CONFIG_SYS_NO_DCACHE is enabled to to cache coherency issues w/DMA.
TBDs to be taken care of in the next phase.
V2:
Changed clock divisor and card clock divisor values based on 216MHz PLLP0
Added some comments as per Allen Martin's review
V3:
Added new pinmux_set_func calls in board.c
Signed-off-by: Tom Warren <twarren@nvidia.com>
BUG=none
TEST=as above, on my T20-A03 Seaboard. U-boot.bin loaded via JTAG.
Change-Id: I5955707034d41f7606ccf4cc99dd8ab5056c103e
Reviewed-on: http://gerrit.chromium.org/gerrit/1745
Tested-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Diffstat (limited to 'include/configs/seaboard.h')
-rw-r--r-- | include/configs/seaboard.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index b4a935d7146..7e79e9e495c 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -69,6 +69,18 @@ #define CONFIG_CMD_SPI #define CONFIG_CMD_SF +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA2_MMC +#define CONFIG_CMD_MMC + +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_SYS_NO_DCACHE //temp fix for DMA / dcache interaction + /* Environment in SPI */ #define CONFIG_ENV_IS_IN_SPI_FLASH |