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authorChander Kashyap <chander.kashyap@linaro.org>2011-12-06 23:34:12 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-12-09 17:30:09 +0100
commit393cb36199d337c8554cc8dfc853f5f405f4742b (patch)
tree2f33a5043d10915372d2ce3f0a76c1372d74a966 /include/configs/s5pc210_universal.h
parent7f8c070ff99aadf153cd90cd0ec1987e8c2ebbe1 (diff)
S5PC2XX: Rename S5pc2XX to exynos
As per new naming convention for Samsung SoC's, all Cortex-A9 and Cortex-A15 based SoC's will be classified under the name Exynos. Cortex-A9 and Cortex-A15 based SoC's will be sub-classified as Exynos4 and Exynos5 respectively. In order to better adapt and reuse code across various upcoming Samsung Exynos based boards, all uses of s5pc210 prefix/suffix/directory-names are renamed in this patch. s5pc210 is renamed as exynos4210 and S5PC210/s5pc210 suffix/prefix are renamed as exynos4/EXYNOS4. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'include/configs/s5pc210_universal.h')
-rw-r--r--include/configs/s5pc210_universal.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index cc14f9797ed..b36ad3a1936 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -2,7 +2,7 @@
* Copyright (C) 2010 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
*
- * Configuation settings for the SAMSUNG Universal (s5pc100) board.
+ * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -32,7 +32,7 @@
*/
#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
#define CONFIG_S5P 1 /* which is in a S5P Family */
-#define CONFIG_S5PC210 1 /* which is in a S5PC210 */
+#define CONFIG_EXYNOS4210 1 /* which is in a EXYNOS4210 */
#define CONFIG_UNIVERSAL 1 /* working with Universal */
#include <asm/arch/cpu.h> /* get chip and board defs */
@@ -47,7 +47,7 @@
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_TEXT_BASE 0x44800000
-/* input clock of PLL: Universal has 24MHz input clock at S5PC210 */
+/* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */
#define CONFIG_SYS_CLK_FREQ_C210 24000000
#define CONFIG_SETUP_MEMORY_TAGS
@@ -249,8 +249,8 @@
/*
* I2C Settings
*/
-#define CONFIG_SOFT_I2C_GPIO_SCL s5pc210_gpio_part1_get_nr(b, 7)
-#define CONFIG_SOFT_I2C_GPIO_SDA s5pc210_gpio_part1_get_nr(b, 6)
+#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)
+#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6)
#define CONFIG_SOFT_I2C
#define CONFIG_SOFT_I2C_READ_REPEATED_START