diff options
| author | Alexander Stein <alexanders83@web.de> | 2015-07-24 09:22:11 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-08-12 20:47:41 -0400 |
| commit | 060f9bf57b1dc1f9260bc1b999d054141b87d7d2 (patch) | |
| tree | ac71ebcf77ce3b3c9e163542dc06d16e28fa6a64 /include/configs/rpi_2.h | |
| parent | 2085ae74dee47ed3da63416aac0305936b43eeea (diff) | |
ARM: bcm283x: Define CONFIG_SYS_CACHELINE_SIZE
The cacheline is always 32 bytes for arm1176 CPUs, so define it at board
config level for cache handling code.
The ARM Cortex-A7 has a dcache line size of 64 bytes.
Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Diffstat (limited to 'include/configs/rpi_2.h')
| -rw-r--r-- | include/configs/rpi_2.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/configs/rpi_2.h b/include/configs/rpi_2.h index 2e7e74fd56..13dc8de143 100644 --- a/include/configs/rpi_2.h +++ b/include/configs/rpi_2.h @@ -9,6 +9,7 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_BCM2836 +#define CONFIG_SYS_CACHELINE_SIZE 64 #include "rpi-common.h" |