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authorParthiban Nallathambi <parthitce@gmail.com>2019-04-10 16:35:32 +0200
committerStefano Babic <sbabic@denx.de>2019-06-11 10:42:48 +0200
commitd2d1191843e4265a1228a2f2b319f9cd31854de2 (patch)
tree52888bed76f733a23bca33be63a02e7829a6c720 /include/configs/pcl063.h
parenta2cd5240d6ffcaabc7259f852277c0fb96470b27 (diff)
imx: Extend PCL063 support for phyCORE-i.MX6ULL SOM
Extend PHYTEC phyBOARD-i.MX6UL for phyCORE-i.MX6UL SoM (PCL063) with eMMC on SoM. CPU: Freescale i.MX6ULL rev1.0 792 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 38C Reset cause: POR Model: Phytec phyBOARD-i.MX6ULL-Segin SBC Board: PHYTEC phyCORE-i.MX6ULL DRAM: 256 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2C - MMC/SD - eMMC - UART (1 & 5) - USB (host & otg) Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
Diffstat (limited to 'include/configs/pcl063.h')
-rw-r--r--include/configs/pcl063.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h
index 12d8d67f0f..8fef250ac4 100644
--- a/include/configs/pcl063.h
+++ b/include/configs/pcl063.h
@@ -22,6 +22,8 @@
* Tweak the SPL text base address to avoid this.
*/
+#define CONFIG_SYS_FSL_USDHC_NUM 1
+
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)