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authorRobert P. J. Day <rpjday@crashcourse.ca>2016-05-03 19:52:49 -0400
committerTom Rini <trini@konsulko.com>2016-05-03 21:36:13 -0400
commitb38eaec53570821043c94ad44eabcb23747d9969 (patch)
tree2514094c034485c93574493d3d067ca8f698e2f0 /include/configs/p1_twr.h
parent700877a62bfa88ef6e0267749db49f4dc63e2ea2 (diff)
include/configs: Numerous typo fixes: "controler" -> "controller".
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Diffstat (limited to 'include/configs/p1_twr.h')
-rw-r--r--include/configs/p1_twr.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index f2959c9b239..9b75afe92a5 100644
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -48,8 +48,8 @@
#define CONFIG_FSL_ELBC
#define CONFIG_PCI
-#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */
+#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
+#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */