diff options
| author | Pali Rohár <pali@kernel.org> | 2022-06-23 18:22:21 +0200 |
|---|---|---|
| committer | Peng Fan <peng.fan@nxp.com> | 2022-07-03 15:13:51 +0800 |
| commit | 6b74cfdcee4df3ee6400866f39e4806c1005a9fd (patch) | |
| tree | 5b91cdb005a2ebff93ce262cbf30a79f3c672849 /include/configs/p1_p2_rdb_pc.h | |
| parent | 2c0073aadd0296f2b83c39260933089e18961f78 (diff) | |
board: freescale: p1_p2_rdb_pc: Remove mapping for TDM-PMC card
From whole P1/P2 family of RDB boards is TDM-PMC card (PCI Mezzanine Card,
Freescale PQ-MDS-T1) available only on P1021RDB and P1025RDB boards.
So address mapping for TDM-PMC card on LBC should not be enabled on any
other P1/P2 RDB board as there is no device at that TDM-PMC address.
Support for P1021RDB and P1025RDB boards was already removed from mainline
U-Boot in commits 6d1dd76afe85 ("board/freescale: Remove P1021RDB board
support") and d521cece5adb ("board/freescale: Remove P1025RDB board
support").
So do not enable TDM-PMC address mapping on remaining P1/P2 RDB boards and
remove all macros related to TDM-PMC address mappings.
Signed-off-by: Pali Rohár <pali@kernel.org>
Diffstat (limited to 'include/configs/p1_p2_rdb_pc.h')
| -rw-r--r-- | include/configs/p1_p2_rdb_pc.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 6d417c57fd..2a24236c11 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -173,7 +173,6 @@ * 0xf8f8_0000 0xf8ff_ffff L2 SRAM Up to 512K cacheable * (early boot only) * 0xff80_0000 0xff80_7fff NAND flash 32K non-cacheable CS1/0 - * 0xff98_0000 0xff98_ffff PMC 64K non-cacheable CS2 * 0xffa0_0000 0xffaf_ffff CPLD 1M non-cacheable CS3 * 0xffb0_0000 0xffbf_ffff VSC7385 switch 1M non-cacheable CS2 * 0xffc0_0000 0xffc3_ffff PCI IO range 256k non-cacheable @@ -280,14 +279,6 @@ #endif /* CPLD config size: 1Mb */ -#define CONFIG_SYS_PMC_BASE 0xff980000 -#define CONFIG_SYS_PMC_BASE_PHYS CONFIG_SYS_PMC_BASE -#define CONFIG_PMC_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \ - BR_PS_8 | BR_V) -#define CONFIG_PMC_OR_PRELIM (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \ - OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \ - OR_GPCM_EAD) - /* Vsc7385 switch */ #ifdef CONFIG_VSC7385_ENET #define __VSCFW_ADDR "vscfw_addr=ef000000\0" |