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authorYork Sun <yorksun@freescale.com>2015-03-20 10:20:40 -0700
committerYork Sun <yorksun@freescale.com>2015-04-23 08:55:53 -0700
commitf8cb101e1e3f5ee2007b78b6b12e24120385aeac (patch)
tree7c7f6856d036f7f873b672143a4c2266d98f392c /include/configs/mx6qsabreauto.h
parent585acc9de65554e2d77dc3d30a65d59b8766ba39 (diff)
driver/i2c/mxc: Enable I2C bus 3 and 4
Some SoCs have more than two I2C busses. Instead of adding ifdef to the driver, macros are put into board header file where CONFIG_SYS_I2C_MXC is defined. Signed-off-by: York Sun <yorksun@freescale.com> CC: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'include/configs/mx6qsabreauto.h')
-rw-r--r--include/configs/mx6qsabreauto.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index 51042ca72e5..22603442d73 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -56,6 +56,7 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* NAND flash command */