diff options
| author | Padmarao Begari <padmarao.begari@microchip.com> | 2019-05-28 15:47:51 +0530 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2019-06-05 13:19:24 +0800 |
| commit | 39494822e3a639c8b5d60538d1dcae17bcf3c5f6 (patch) | |
| tree | 4e78f6885e9460c29401e5bd66334ac38c6d94f6 /include/configs/microchip_mpfs_icicle.h | |
| parent | e64db0d92e320beec3214b78a4fb5cb81b8652dc (diff) | |
riscv: Add Microchip MPFS Icicle board support
This patch adds Microchip MPFS Icicle board support.
For now, NS16550 serial driver is only enabled.
The Microchip MPFS Icicle defconfig by default builds
U-Boot for M-Mode with SMP support.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Diffstat (limited to 'include/configs/microchip_mpfs_icicle.h')
| -rw-r--r-- | include/configs/microchip_mpfs_icicle.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h new file mode 100644 index 0000000000..82c7fbbdf2 --- /dev/null +++ b/include/configs/microchip_mpfs_icicle.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Microchip Technology Inc. + * Padmarao Begari <padmarao.begari@microchip.com> + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * CPU and Board Configuration Options + */ +#define CONFIG_BOOTP_SEND_HOSTNAME + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ + +/* + * Print Buffer Size + */ +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* + * max number of command args + */ +#define CONFIG_SYS_MAXARGS 16 + +/* + * Boot Argument Buffer Size + */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +/* + * Size of malloc() pool + * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough + */ +#define CONFIG_SYS_MALLOC_LEN (512 << 10) + +/* + * Physical Memory Map + */ +#define PHYS_SDRAM_0 0x80000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_0_SIZE 0x40000000 /* 1 GB */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 + +/* Init Stack Pointer */ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x200000) + +#define CONFIG_SYS_LOAD_ADDR 0x80000000 /* SDRAM */ + +/* + * memtest works on DRAM + */ +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0 +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) + +/* When we use RAM as ENV */ +#define CONFIG_ENV_SIZE 0x2000 + +#endif /* __CONFIG_H */ |