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authorDavid Brownell <david-b@pacbell.net>2008-01-18 12:55:00 -0800
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2008-03-30 15:38:05 +0200
commit480ed1dea103a1c8f4591afc77d2de3c7868d983 (patch)
tree3742d043b46f92c9767505d92e6f1ace8bd66954 /include/configs/cmc_pu2.h
parenta3543d6dc52b0ba9c64016687cf32d600b31a476 (diff)
use correct at91rm9200 register name
This fixes a naming bug for at91rm9200 lowlevel init code: NOR boot flash is on chipselect 0, not chipselect 2. This makes code use the register name from chip datasheets. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'include/configs/cmc_pu2.h')
-rw-r--r--include/configs/cmc_pu2.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h
index d22d3505799..bce5fcd82f5 100644
--- a/include/configs/cmc_pu2.h
+++ b/include/configs/cmc_pu2.h
@@ -50,7 +50,7 @@
#define MC_ASR_VAL 0x00000000
#define MC_AASR_VAL 0x00000000
#define EBI_CFGR_VAL 0x00000000
-#define SMC2_CSR_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */
+#define SMC_CSR0_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */
/* clocks */
#define PLLAR_VAL 0x2026BE04 /* 179,712 MHz for PCK */