diff options
| author | Mario Six <mario.six@gdsys.cc> | 2019-01-21 09:18:15 +0100 |
|---|---|---|
| committer | Mario Six <mario.six@gdsys.cc> | 2019-05-21 07:52:33 +0200 |
| commit | 8a81bfd271f9122933c865c790780024f5e2d576 (patch) | |
| tree | a1318cdefd36bf1e10a47f3c5dd253dd811f0850 /include/configs/caddy2.h | |
| parent | 7c2e535770f56f5788e3771b9ee2dbf40ec4d93f (diff) | |
mpc83xx: Get rid of CONFIG_SYS_DDR_BASE
CONFIG_SYS_DDR_BASE is specific to mpc83xx an is always set to the same
value as CONFIG_SYS_SDRAM_BASE. Just use CONFIG_SYS_SDRAM_BASE instead.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'include/configs/caddy2.h')
| -rw-r--r-- | include/configs/caddy2.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/include/configs/caddy2.h b/include/configs/caddy2.h index a0642aef11..f14e5faafa 100644 --- a/include/configs/caddy2.h +++ b/include/configs/caddy2.h @@ -51,9 +51,8 @@ */ #undef CONFIG_DDR_32BIT -#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is sys memory*/ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE -#define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is sys memory*/ +#define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \ | DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075) #define CONFIG_DDR_2T_TIMING |