diff options
author | Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> | 2022-08-25 08:54:00 +0200 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2022-09-15 14:22:08 -0400 |
commit | 6dfc1f4c5139c9310ae36e0b12a9d2aa4984cd66 (patch) | |
tree | 58d6c5ba88537795c8016b66b32d30935dfe2e51 /include/configs/brppt1.h | |
parent | d9e85eeebabd5fc0c95be96bd70fa7362eb89f33 (diff) |
brppt1: Remove unused board variants
The SPI and NAND board variants never went into production.
Drop those board variants.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Diffstat (limited to 'include/configs/brppt1.h')
-rw-r--r-- | include/configs/brppt1.h | 64 |
1 files changed, 2 insertions, 62 deletions
diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index 6cb1a10600..481473ae2c 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -27,31 +27,7 @@ * the Linux kernel. */ -#ifdef CONFIG_SPL_OS_BOOT -/* RAW SD card / eMMC */ - -#endif /* CONFIG_SPL_OS_BOOT */ - -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#endif /* CONFIG_MTD_RAW_NAND */ - -#ifdef CONFIG_MTD_RAW_NAND -#define NANDTGTS \ -"cfgscr=mw ${dtbaddr} 0; nand read ${cfgaddr} cfgscr && source ${cfgaddr};" \ -" fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" \ -"nandargs=setenv bootargs console=${console} ${optargs} ${optargs_rot} " \ - "root=mtd6 rootfstype=jffs2 b_mode=${b_mode}\0" \ -"b_nand=nand read ${loadaddr} kernel; nand read ${dtbaddr} dtb; " \ - "run nandargs; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \ -"b_tgts_std=usb0 nand net\0" \ -"b_tgts_rcy=net usb0 nand\0" \ -"b_tgts_pme=usb0 nand net\0" -#else -#define NANDTGTS "" -#endif /* CONFIG_MTD_RAW_NAND */ - -#define MMCSPI_TGTS \ +#define MMC_TGTS \ "t30args#0=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \ "b_mode=${b_mode} root=/dev/mmcblk0p2 rootfstype=ext4\0" \ "b_t30lgcy#0=" \ @@ -76,7 +52,7 @@ #ifdef CONFIG_ENV_IS_IN_MMC #define MMCTGTS \ -MMCSPI_TGTS \ +MMC_TGTS \ "cfgscr=mw ${dtbaddr} 0;" \ " mmc dev 1; mmc read ${cfgaddr} 200 80; source ${cfgaddr};" \ " fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" @@ -84,16 +60,6 @@ MMCSPI_TGTS \ #define MMCTGTS "" #endif /* CONFIG_MMC */ -#ifdef CONFIG_SPI -#define SPITGTS \ -MMCSPI_TGTS \ -"cfgscr=mw ${dtbaddr} 0;" \ -" sf probe; sf read ${cfgaddr} 0xC0000 10000; source ${cfgaddr};" \ -" fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" -#else -#define SPITGTS "" -#endif /* CONFIG_SPI */ - #define LOAD_OFFSET(x) 0x8##x #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -110,8 +76,6 @@ BUR_COMMON_ENV \ "b_usb0=usb start && load usb 0 ${scraddr} bootscr.img && source ${scraddr}\0" \ "b_net=tftp ${scraddr} netscript.img && source ${scraddr}\0" \ MMCTGTS \ -SPITGTS \ -NANDTGTS \ "b_deftgts=if test ${b_mode} = 12; then setenv b_tgts ${b_tgts_pme};" \ " elif test ${b_mode} = 0; then setenv b_tgts ${b_tgts_rcy};" \ " else setenv b_tgts ${b_tgts_std}; fi\0" \ @@ -119,28 +83,4 @@ NANDTGTS \ " do echo \"### booting ${target} ###\"; run b_${target};" \ " if test ${b_break} = 1; then; exit; fi; done\0" -#ifdef CONFIG_MTD_RAW_NAND -/* - * GPMC block. We support 1 device and the physical address to - * access CS0 at is 0x8000000. - */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x8000000 -/* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */ -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, \ - 10, 11, 12, 13, 14, 15, 16, 17, \ - 18, 19, 20, 21, 22, 23, 24, 25, \ - 26, 27, 28, 29, 30, 31, 32, 33, \ - 34, 35, 36, 37, 38, 39, 40, 41, \ - 42, 43, 44, 45, 46, 47, 48, 49, \ - 50, 51, 52, 53, 54, 55, 56, 57, } - -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 14 - -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE - -#define CONFIG_NAND_OMAP_GPMC_WSCFG 1 -#endif /* CONFIG_MTD_RAW_NAND */ - #endif /* ! __CONFIG_BRPPT1_H__ */ |