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authorCamelia Groza <camelia.groza@nxp.com>2021-06-16 17:47:31 +0530
committerPriyanka Jain <priyanka.jain@nxp.com>2021-06-17 11:46:11 +0530
commit4e21a555c1dc2eacee9e3ad07f3b112c20b0f7a2 (patch)
tree5741bc19f289878ce37f2d3f34f4ebc1f1f9e69c /include/configs/T208xRDB.h
parentc91b1305547ee72c0b0e5995c3b47d2b56ad698f (diff)
board: freescale: t208xrdb: add Linux fdt fix-ups for rev D
The T2080RDB boards revisions D and up have updated 10G Aquantia PHYs connected to MAC1 and MAC2. The second Aquantia PHY is located at a different address on the MDIO bus compared to rev C (0x8 instead of 0x1). Fix-up the Linux device tree to update the PHY address for the second Aquantia PHY on boards revisions D and up. Also rename the PHY node to reflect the changes. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'include/configs/T208xRDB.h')
-rw-r--r--include/configs/T208xRDB.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index b5197b3ed9..9449e30bfc 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -537,8 +537,12 @@ unsigned long get_board_ddr_clk(void);
#define RGMII_PHY2_ADDR 0x02
#define CORTINA_PHY_ADDR1 0x0c /* Cortina CS4315 */
#define CORTINA_PHY_ADDR2 0x0d
-#define FM1_10GEC3_PHY_ADDR 0x00 /* Aquantia AQ1202 10G Base-T */
+/* Aquantia AQ1202 10G Base-T used by board revisions up to C */
+#define FM1_10GEC3_PHY_ADDR 0x00
#define FM1_10GEC4_PHY_ADDR 0x01
+/* Aquantia AQR113C 10G Base-T used by board revisions D and up */
+#define AQR113C_PHY_ADDR1 0x00
+#define AQR113C_PHY_ADDR2 0x08
#endif
#ifdef CONFIG_FMAN_ENET