summaryrefslogtreecommitdiff
path: root/include/configs/PMC405.h
diff options
context:
space:
mode:
authorMatthias Fuchs <matthias.fuchs@esd-electronics.com>2009-04-29 09:50:58 +0200
committerWolfgang Denk <wd@denx.de>2009-06-12 20:39:46 +0200
commit0bb10630364c48d9857cbf5353da609fc4dd6751 (patch)
tree1f15311ab5276d91603b5cc09876264700aa2567 /include/configs/PMC405.h
parent7cc635fb35f5b94e304fa2243d56758f57f6416b (diff)
4xx: Remove binary cpld bitstream from PMC405 board
This patch removes the cpld binary bitstream that is used by esd's cpld command on PMC405 boards. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs/PMC405.h')
-rw-r--r--include/configs/PMC405.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h
index c598d00cf0c..a9e71346e0f 100644
--- a/include/configs/PMC405.h
+++ b/include/configs/PMC405.h
@@ -282,9 +282,6 @@
/*
* FPGA stuff
*/
-#define CONFIG_SYS_FPGA_XC95XL 1 /* using Xilinx XC95XL CPLD */
-#define CONFIG_SYS_FPGA_MAX_SIZE (32 * 1024) /* 32kByte for CPLD */
-
/* FPGA program pin configuration */
#define CONFIG_SYS_FPGA_PRG 0x04000000 /* JTAG TMS pin (output) */
#define CONFIG_SYS_FPGA_CLK 0x02000000 /* JTAG TCK pin (output) */