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authorWolfgang Denk <wd@denx.de>2008-05-20 16:00:29 +0200
committerWolfgang Denk <wd@denx.de>2008-05-21 00:14:08 +0200
commit53677ef18e25c97ac613349087c5cb33ae5a2741 (patch)
treef947d34d6efaee2401ea0e4c6104ef2f6a0f7ad0 /include/configs/PM856.h
parent727f63334676e760877d43bfb8f0e9331ac8b101 (diff)
Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/configs/PM856.h')
-rw-r--r--include/configs/PM856.h22
1 files changed, 11 insertions, 11 deletions
diff --git a/include/configs/PM856.h b/include/configs/PM856.h
index 38a26dc8aa..9355aafa61 100644
--- a/include/configs/PM856.h
+++ b/include/configs/PM856.h
@@ -43,7 +43,7 @@
#define CONFIG_PM856 1 /* PM856 board specific */
#define CONFIG_PCI
-#define CONFIG_TSEC_ENET /* tsec ethernet support */
+#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
#undef CONFIG_SPD_EEPROM /* do not use SPD EEPROM for DDR setup*/
#define CONFIG_DDR_ECC /* only for ECC DDR module */
@@ -92,7 +92,7 @@
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
*/
-#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
+#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
@@ -141,7 +141,7 @@
#define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
#define CFG_RAMBOOT
@@ -167,16 +167,16 @@
#define CONFIG_L1_INIT_RAM
-#define CFG_INIT_RAM_LOCK 1
+#define CFG_INIT_RAM_LOCK 1
#define CFG_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
-#define CFG_INIT_RAM_END 0x4000 /* End of used area in RAM */
+#define CFG_INIT_RAM_END 0x4000 /* End of used area in RAM */
-#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
+#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
-#define CFG_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
-#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
+#define CFG_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
+#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
/* Serial Port */
#define CONFIG_CONS_ON_SCC /* define if console on SCC */
@@ -236,7 +236,7 @@
#if defined(CONFIG_PCI)
#define CONFIG_NET_MULTI
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100
#undef CONFIG_TULIP
@@ -244,7 +244,7 @@
#if !defined(CONFIG_PCI_PNP)
#define PCI_ENET0_IOADDR 0xe0000000
#define PCI_ENET0_MEMADDR 0xe0000000
- #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */
+ #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */
#endif
#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
@@ -256,7 +256,7 @@
#if defined(CONFIG_TSEC_ENET)
#ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI 1
+#define CONFIG_NET_MULTI 1
#endif
#define CONFIG_MII 1 /* MII PHY management */