diff options
| author | Andy Fleming <afleming@freescale.com> | 2007-02-24 01:08:13 -0600 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2007-05-02 15:50:13 -0500 |
| commit | ffa621a0d12a1ccd81c936c567f8917a213787a8 (patch) | |
| tree | 3dcae45bdac750bb7a7cb377a975f0dbd5b70b3a /include/configs/MPC8548CDS.h | |
| parent | 6743105988fc44d5b0d30388c790607835aae7a6 (diff) | |
Cleaned up some 85xx PCI bugs
* Cleaned up the CDS PCI Config Tables and added NULL entries to
the end
* Fixed PCIe LAWBAR assignemt to use the cpu-relative address
* Fixed 85xx PCI code to assign powar region sizes based on the
config values (rather than hard-coding them)
* Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'include/configs/MPC8548CDS.h')
| -rw-r--r-- | include/configs/MPC8548CDS.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 14936c28ae5..680009d6006 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -352,16 +352,16 @@ extern unsigned long get_clock_freq(void); #define CFG_PCI2_MEM_BASE 0x90000000 #define CFG_PCI2_MEM_PHYS CFG_PCI2_MEM_BASE #define CFG_PCI2_MEM_SIZE 0x10000000 /* 256M */ -#define CFG_PCI2_IO_BASE 0xe2800000 +#define CFG_PCI2_IO_BASE 0x00000000 #define CFG_PCI2_IO_PHYS 0xe2800000 #define CFG_PCI2_IO_SIZE 0x00800000 /* 8M */ #define CFG_PEX_MEM_BASE 0xa0000000 #define CFG_PEX_MEM_PHYS CFG_PEX_MEM_BASE #define CFG_PEX_MEM_SIZE 0x20000000 /* 512M */ -#define CFG_PEX_IO_BASE 0xe3000000 -#define CFG_PEX_IO_PHYS CFG_PEX_IO_BASE -#define CFG_PEX_IO_SIZE 0x1000000 /* 16M */ +#define CFG_PEX_IO_BASE 0x00000000 +#define CFG_PEX_IO_PHYS 0xe3000000 +#define CFG_PEX_IO_SIZE 0x01000000 /* 16M */ /* * RapidIO MMU |