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authorwdenk <wdenk>2004-02-23 22:22:28 +0000
committerwdenk <wdenk>2004-02-23 22:22:28 +0000
commit63e73c9a8ed5b32d9c4067ffaad953e9a8fe8f0a (patch)
tree2f8915e0b3024c639748e930b56d60c0d8cf2d99 /include/configs/DK1S10.h
parentcd0a9de68b03e5a54fd2a08f44be318e4397be01 (diff)
* Patches by Reinhard Meyer, 14 Feb 2004:
- update board/emk tree; use common flash driver - Corrected tested bits in machine check exception in cpu/mpc5xxx/traps.c [adapted for other PPC CPUs -- wd] - Added support for the M48T08 on the EVAL5200 board in rtc/mk48t59.c * Patch by Jon Diekema, 13 Feb 2004: Call show_boot_progress() whenever POST "FAILED" is printed. * Patch by Nishant Kamat, 13 Feb 2004: Add support for TI OMAP1610 H2 Board Fixes for cpu/arm926ejs/interrupt.c (based on Richard Woodruff's patch for arm925, 16 Oct 03) Fix for a timer bug in OMAP1610 Innovator Add support for CS0 (ROM)/CS3 (Flash) boot in OMAP1610 Innovator and H2 * Patches by Stephan Linz, 12 Feb 2004: - add support for NIOS timer with variable period preload counter value - prepare POST framework support for NIOS targets * Patch by Denis Peter, 11 Feb 2004: add POST support for the MIP405 board
Diffstat (limited to 'include/configs/DK1S10.h')
-rw-r--r--include/configs/DK1S10.h40
1 files changed, 38 insertions, 2 deletions
diff --git a/include/configs/DK1S10.h b/include/configs/DK1S10.h
index 835c7a23e15..e5e487c65d2 100644
--- a/include/configs/DK1S10.h
+++ b/include/configs/DK1S10.h
@@ -168,10 +168,28 @@
#define CFG_NIOS_TMRBASE CFG_NIOS_CPU_TIMER0 /* TIMER0 as tick */
#define CFG_NIOS_TMRIRQ CFG_NIOS_CPU_TIMER0_IRQ
+#if (CFG_NIOS_CPU_TIMER0_FP == 1) /* fixed period */
+
#if (CFG_NIOS_CPU_TIMER0_PER >= CFG_HZ)
#define CFG_NIOS_TMRMS (CFG_NIOS_CPU_TIMER0_PER / CFG_HZ)
#else
-#error *** CFG_ERROR: you have to use a timer periode of more than CFG_HZ
+#error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ
+#endif
+
+#undef CFG_NIOS_TMRCNT /* no preloadable counter value */
+
+#elif (CFG_NIOS_CPU_TIMER0_FP == 0) /* variable period */
+
+#if (CFG_HZ <= 1000)
+#define CFG_NIOS_TMRMS (1000 / CFG_HZ)
+#else
+#error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000
+#endif
+
+#define CFG_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CFG_HZ)
+
+#else
+#error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER0_FP correct
#endif
#elif (CFG_NIOS_CPU_TICK_TIMER == 1)
@@ -179,10 +197,28 @@
#define CFG_NIOS_TMRBASE CFG_NIOS_CPU_TIMER1 /* TIMER1 as tick */
#define CFG_NIOS_TMRIRQ CFG_NIOS_CPU_TIMER1_IRQ
+#if (CFG_NIOS_CPU_TIMER1_FP == 1) /* fixed period */
+
#if (CFG_NIOS_CPU_TIMER1_PER >= CFG_HZ)
#define CFG_NIOS_TMRMS (CFG_NIOS_CPU_TIMER1_PER / CFG_HZ)
#else
-#error *** CFG_ERROR: you have to use a timer periode of more than CFG_HZ
+#error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ
+#endif
+
+#undef CFG_NIOS_TMRCNT /* no preloadable counter value */
+
+#elif (CFG_NIOS_CPU_TIMER1_FP == 0) /* variable period */
+
+#if (CFG_HZ <= 1000)
+#define CFG_NIOS_TMRMS (1000 / CFG_HZ)
+#else
+#error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000
+#endif
+
+#define CFG_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CFG_HZ)
+
+#else
+#error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER1_FP correct
#endif
#endif /* CFG_NIOS_CPU_TICK_TIMER */