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authorStefan Roese <sr@denx.de>2006-01-18 20:03:15 +0100
committerStefan Roese <sr@denx.de>2006-01-18 20:03:15 +0100
commit2076d0a15ff1dba2b46d96e81d02d625254611ff (patch)
tree022f104e6f363e11a0b47b9305fa04e0caccec3d /include/configs/CPCI4052.h
parentc4b465f63e3b6fc998526dc217ff988e5c91e667 (diff)
PMC405 and CPCI405: Moved configuration of pci resources into config file.
PMC405 and CPCI2DP: Added firmware download and booting via pci. Patch by Matthias Fuchs, 20 Dec 2005
Diffstat (limited to 'include/configs/CPCI4052.h')
-rw-r--r--include/configs/CPCI4052.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index 13dbe80daf9..1347f2afcae 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -178,8 +178,8 @@
#define CFG_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */
#define CFG_PCI_SUBSYS_DEVICEID2 0x0406 /* PCI Device ID: CPCI-405-A */
#define CFG_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/
-#define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */
-#define CFG_PCI_PTM1MS 0xfc000001 /* 64MB, enable hard-wired to 1 */
+#define CFG_PCI_PTM1LA (bd->bi_memstart) /* point to sdram */
+#define CFG_PCI_PTM1MS (~(bd->bi_memsize - 1) | 1) /* memsize, enable hard-wired to 1 */
#define CFG_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
#define CFG_PCI_PTM2LA 0xffc00000 /* point to flash */
#define CFG_PCI_PTM2MS 0xffc00001 /* 4MB, enable */