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authorPrabhakar Kushwaha <prabhakar@freescale.com>2013-10-04 10:05:50 +0530
committerScott Wood <scottwood@freescale.com>2013-11-21 13:33:40 -0600
commitaffd520f8ce506eab96e66ad525c4807871e2981 (patch)
tree27deb770b12db77985deb84c60111ea35fb6bfb0 /include/configs/C29XPCIE.h
parent71220f80e7489b7fc1766f573ae89c64db2419ce (diff)
board/c29xpcie: Add support of 8K page size NAND flash
Defines constants required to support 8K page size NAND flash. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Diffstat (limited to 'include/configs/C29XPCIE.h')
-rw-r--r--include/configs/C29XPCIE.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 08156c531dd..bb157453729 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -191,13 +191,14 @@
| CSPR_MSEL_NAND \
| CSPR_V)
#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024)
+#define CONFIG_SYS_NAND_OOBSIZE 0x00000280 /* 640b */
#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \
| CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \
| CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
- | CSOR_NAND_RAL_2 /* RAL = 2 Bytes */ \
- | CSOR_NAND_PGS_2K /* Page Size = 2k */ \
- | CSOR_NAND_SPRZ_64 /* Spare size = 64 */ \
- | CSOR_NAND_PB(64)) /* 64 Pages Per Block */
+ | CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \
+ | CSOR_NAND_PGS_8K /* Page Size = 8K */ \
+ | CSOR_NAND_SPRZ_CSOR_EXT /*oob in csor_ext*/\
+ | CSOR_NAND_PB(128)) /*128 Pages Per Block*/
#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x01) | \
FTIM0_NAND_TWP(0x0c) | \
FTIM0_NAND_TWCHT(0x08) | \
@@ -224,6 +225,7 @@
#define CONFIG_SYS_CSPR1 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK1 CONFIG_SYS_NAND_AMASK
#define CONFIG_SYS_CSOR1 CONFIG_SYS_NAND_CSOR
+#define CONFIG_SYS_CSOR1_EXT CONFIG_SYS_NAND_OOBSIZE
#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NAND_FTIM0
#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1
#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2