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authorPo Liu <po.liu@freescale.com>2013-08-21 14:22:18 +0800
committerYork Sun <yorksun@freescale.com>2013-10-16 16:13:11 -0700
commitac2785c63ed47123fbefa60b6a6c38029b1c2ed5 (patch)
tree54b0ea00cbaa11e33e9e5aa11ac3ef578024ca96 /include/configs/C29XPCIE.h
parent0d2cff2d9eddfd1e7f60f76889b65b931cb25237 (diff)
powerpc:c29xpcie: make ifc timing parameter flexible
This patch re-config the NOR flash timing parameters which could make the ifc timing more flexible for NOR flash. The new parameters could fix the problem of hanging at "Flash:" occasionally when booting the board. Signed-off-by: Po Liu <Po.Liu@freescale.com>
Diffstat (limited to 'include/configs/C29XPCIE.h')
-rw-r--r--include/configs/C29XPCIE.h8
1 files changed, 5 insertions, 3 deletions
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 83779eff86b..cce2288da86 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -154,14 +154,16 @@
CSPR_V)
#define CONFIG_SYS_NOR_AMASK IFC_AMASK(64*1024*1024)
#define CONFIG_SYS_NOR_CSOR CSOR_NOR_ADM_SHIFT(4)
+
#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \
FTIM0_NOR_TEADC(0x5) | \
FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x1e) | \
- FTIM1_NOR_TRAD_NOR(0x0f) | \
- FTIM1_NOR_TSEQRAD_NOR(0x0f))
+#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \
+ FTIM1_NOR_TRAD_NOR(0x1A) |\
+ FTIM1_NOR_TSEQRAD_NOR(0x13))
#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \
FTIM2_NOR_TCH(0x4) | \
+ FTIM2_NOR_TWPH(0x0E) | \
FTIM2_NOR_TWP(0x1c))
#define CONFIG_SYS_NOR_FTIM3 0x0