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| author | Ye Li <ye.li@nxp.com> | 2021-10-25 10:59:20 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2022-07-18 13:55:17 +0800 |
| commit | 49338b3ffd80f9f4f672ee0bfdd445340d0b591b (patch) | |
| tree | a935b16303a59a614cabaed9d8cc34bb7eb93478 /include/axp_pmic.h | |
| parent | c1ca49235a0b006d304892d365e414571d7f8a60 (diff) | |
MLK-25979-3 imx8ulp: xrdc: Set MRC4/5 for access DDR from A35 and APD PER
iMX8ULP A1 S400 ROM will remove the setting for MRC4/5. So we have to set
them in SPL to allow access to DDR from A35 and APD PER masters
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'include/axp_pmic.h')
0 files changed, 0 insertions, 0 deletions