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authorScott Wood <scottwood@freescale.com>2009-08-20 17:45:05 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-09-15 21:30:08 -0500
commitdcc87dd58db466caa2d66755c5ec9455edf42fe8 (patch)
treea1d1174bd31fc211141eb7bc8e18354219f24686 /include/asm-ppc
parent1b72dbecca2d7ad7a21c92d80227daa2d8ec5a57 (diff)
ppc/85xx: Ensure that MAS8 is zero when writing TLB entries.
Its reset value is random, and we sometimes read uninitialized TLB arrays. Make sure that we don't retain MAS8 from reading such an entry if the VF bit in MAS8 is set, attempts to use the mapping will trap. Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'include/asm-ppc')
-rw-r--r--include/asm-ppc/processor.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index 0a4c66c9d9e..3764a5a51d5 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -518,6 +518,7 @@
#define SPRN_MAS5 0x275 /* MMU Assist Register 5 */
#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */
#define SPRN_MAS7 0x3B0 /* MMU Assist Register 7 */
+#define SPRN_MAS8 0x155 /* MMU Assist Register 8 */
#define SPRN_IVOR32 0x210 /* Interrupt Vector Offset Register 32 */
#define SPRN_IVOR33 0x211 /* Interrupt Vector Offset Register 33 */
@@ -720,6 +721,7 @@
#define MAS5 SPRN_MAS5
#define MAS6 SPRN_MAS6
#define MAS7 SPRN_MAS7
+#define MAS8 SPRN_MAS8
#if defined(CONFIG_4xx) || defined(CONFIG_44x) || defined(CONFIG_MPC85xx)
#define DAR_DEAR DEAR