diff options
| author | TsiChungLiew <Tsi-Chung.Liew@freescale.com> | 2007-08-15 19:38:15 -0500 |
|---|---|---|
| committer | John Rigby <jrigby@freescale.com> | 2007-08-16 17:43:20 -0600 |
| commit | 56115665b4a64c10c01440c57749b265e0908fa4 (patch) | |
| tree | 8de58cc90d879a603e1338ec1f6e9f2c4521f193 /include/asm-m68k/immap.h | |
| parent | 83ec20bc4380eebddfde45da6e3a69a92d4db21d (diff) | |
ColdFire: MCF52x2 Header files update
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Diffstat (limited to 'include/asm-m68k/immap.h')
| -rw-r--r-- | include/asm-m68k/immap.h | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/include/asm-m68k/immap.h b/include/asm-m68k/immap.h index 2555e7e8294..3ee7071f399 100644 --- a/include/asm-m68k/immap.h +++ b/include/asm-m68k/immap.h @@ -26,6 +26,97 @@ #ifndef __IMMAP_H #define __IMMAP_H +#ifdef CONFIG_M5249 +#include <asm/immap_5249.h> +#include <asm/m5249.h> + +#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x40)) + +#define CFG_INTR_BASE (MMAP_INTC) +#define CFG_NUM_IRQS (64) + +/* Timer */ +#ifdef CONFIG_MCFTMR +#define CFG_UDELAY_BASE (MMAP_DTMR0) +#define CFG_TMR_BASE (MMAP_DTMR1) +#define CFG_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) +#define CFG_TMRINTR_NO (31) +#define CFG_TMRINTR_MASK (0x00000400) +#define CFG_TMRINTR_PEND (CFG_TMRINTR_MASK) +#define CFG_TMRINTR_PRI (0) /* Level must include inorder to work */ +#define CFG_TIMER_PRESCALER (((gd->bus_clk / 2000000) - 1) << 8) +#endif +#endif /* CONFIG_M5249 */ + +#ifdef CONFIG_M5271 +#include <asm/immap_5271.h> +#include <asm/m5271.h> + +#define CFG_FEC0_IOBASE (MMAP_FEC) +#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x40)) + +/* Timer */ +#ifdef CONFIG_MCFTMR +#define CFG_UDELAY_BASE (MMAP_DTMR0) +#define CFG_TMR_BASE (MMAP_DTMR3) +#define CFG_TMRPND_REG (((volatile int0_t *)(CFG_INTR_BASE))->iprl0) +#define CFG_TMRINTR_NO (INT0_LO_DTMR3) +#define CFG_TMRINTR_MASK (INTC_IPRL_INT22) +#define CFG_TMRINTR_PEND (CFG_TMRINTR_MASK) +#define CFG_TMRINTR_PRI (0) /* Level must include inorder to work */ +#define CFG_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#endif + +#define CFG_INTR_BASE (MMAP_INTC0) +#define CFG_NUM_IRQS (128) +#endif /* CONFIG_M5271 */ + +#ifdef CONFIG_M5272 +#include <asm/immap_5272.h> +#include <asm/m5272.h> + +#define CFG_FEC0_IOBASE (MMAP_FEC) +#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x40)) + +#define CFG_INTR_BASE (MMAP_INTC) +#define CFG_NUM_IRQS (64) + +/* Timer */ +#ifdef CONFIG_MCFTMR +#define CFG_UDELAY_BASE (MMAP_TMR0) +#define CFG_TMR_BASE (MMAP_TMR3) +#define CFG_TMRPND_REG (((volatile intctrl_t *)(CFG_INTR_BASE))->int_isr) +#define CFG_TMRINTR_NO (INT_TMR3) +#define CFG_TMRINTR_MASK (INT_ISR_INT24) +#define CFG_TMRINTR_PEND (0) +#define CFG_TMRINTR_PRI (INT_ICR1_TMR3PI | INT_ICR1_TMR3IPL(5)) +#define CFG_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#endif +#endif /* CONFIG_M5272 */ + +#ifdef CONFIG_M5282 +#include <asm/immap_5282.h> +#include <asm/m5282.h> + +#define CFG_FEC0_IOBASE (MMAP_FEC) +#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x40)) + +#define CFG_INTR_BASE (MMAP_INTC0) +#define CFG_NUM_IRQS (128) + +/* Timer */ +#ifdef CONFIG_MCFTMR +#define CFG_UDELAY_BASE (MMAP_DTMR0) +#define CFG_TMR_BASE (MMAP_DTMR3) +#define CFG_TMRPND_REG (((volatile int0_t *)(CFG_INTR_BASE))->iprl0) +#define CFG_TMRINTR_NO (INT0_LO_DTMR3) +#define CFG_TMRINTR_MASK (1 << INT0_LO_DTMR3) +#define CFG_TMRINTR_PEND (CFG_TMRINTR_MASK) +#define CFG_TMRINTR_PRI (0x1E) /* Level must include inorder to work */ +#define CFG_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#endif +#endif /* CONFIG_M5282 */ + #ifdef CONFIG_M5329 #include <asm/immap_5329.h> #include <asm/m5329.h> |