diff options
| author | Nick Thompson <nick.thompson@gefanuc.com> | 2009-12-12 17:12:26 -0500 |
|---|---|---|
| committer | Sudhakar Rajashekhara <sudhakar.raj@ti.com> | 2010-01-14 10:36:46 +0530 |
| commit | e91e4180f75415d17b3a3da66f71cb34e0310403 (patch) | |
| tree | 124b2071bade7b177dca87a8938c62d3c2a6bb6f /include/asm-arm | |
| parent | 2e0e2b334bb2d3b8b0622aa00438e1287d433e5e (diff) | |
Davinci: Configurable NAND chip selects
Davinci: Configurable NAND chip selects
Davinci: Configurable NAND chip selects
Add a CONFIG_SYS_NAND_CS setting to all davinci configs and
use it to setup the NAND controller in the davinci_nand
mtd driver.
Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
Diffstat (limited to 'include/asm-arm')
| -rw-r--r-- | include/asm-arm/arch-davinci/emif_defs.h | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/include/asm-arm/arch-davinci/emif_defs.h b/include/asm-arm/arch-davinci/emif_defs.h index c91e30c8fc..d67292f4b4 100644 --- a/include/asm-arm/arch-davinci/emif_defs.h +++ b/include/asm-arm/arch-davinci/emif_defs.h @@ -51,10 +51,7 @@ typedef struct { dv_reg NANDFCR; dv_reg NANDFSR; u_int8_t RSVD1[8]; - dv_reg NANDF1ECC; - dv_reg NANDF2ECC; - dv_reg NANDF3ECC; - dv_reg NANDF4ECC; + dv_reg NANDFECC[4]; u_int8_t RSVD2[60]; dv_reg NAND4BITECCLOAD; dv_reg NAND4BITECC1; @@ -68,4 +65,13 @@ typedef struct { } emif_registers; typedef emif_registers *emifregs; + +#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4) +#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) ((n-2) << 4) + +#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + (n-2))) + +#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12) +#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13) + #endif |