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authorStefan Roese <sr@denx.de>2018-12-18 10:27:14 +0100
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2018-12-19 15:23:01 +0100
commita5f50e0114f9fd39c16e416aad2aa292aaaaacd6 (patch)
tree7ba124767db78f8fcf452ec21790ab848ada1a1d /examples
parent8da7495299230fb77d354ad507c5216f46d1dd37 (diff)
mips: mt76xx: Flush d-cache in arch_misc_init() to solve d-cache issues
It has been noticed, that sometimes the d-cache is not in a "clean-state" when U-Boot is running on MT7688. This was detected when using the ethernet driver (which uses d-cache) and a TFTP command does not complete. Flushing the complete d-cache (again?) here seems to fix this issue. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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