diff options
author | Wolfgang Denk <wd@denx.de> | 2008-05-04 01:03:30 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-05-04 01:03:30 +0200 |
commit | fb98f94fcbdf0adef6650f6a95ac6e77b0f6e63e (patch) | |
tree | ef2a53892d00ecfd9a09d4597eedea783b291cf4 /drivers | |
parent | bd98ee60df43ee6dd6f5ebe32c67d03e90513ff8 (diff) | |
parent | 7c0773fde6100b61be2558cb5d8c442a3194aecb (diff) |
Merge branch 'master' of /home/wd/git/u-boot/master/
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/tsec.c | 6 | ||||
-rw-r--r-- | drivers/net/tsec.h | 11 |
2 files changed, 13 insertions, 4 deletions
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 9d22aa38be5..c7af930b6b0 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -1277,6 +1277,12 @@ struct phy_info phy_info_VSC8601 = { {MIIM_CONTROL, MIIM_CONTROL_INIT, &mii_cr_init}, #ifdef CFG_VSC8601_SKEWFIX {MIIM_VSC8601_EPHY_CON,MIIM_VSC8601_EPHY_CON_INIT_SKEW,NULL}, +#if defined(CFG_VSC8601_SKEW_TX) && defined(CFG_VSC8601_SKEW_RX) + {MIIM_EXT_PAGE_ACCESS,1,NULL}, +#define VSC8101_SKEW (CFG_VSC8601_SKEW_TX<<14)|(CFG_VSC8601_SKEW_RX<<12) + {MIIM_VSC8601_SKEW_CTRL,VSC8101_SKEW,NULL}, + {MIIM_EXT_PAGE_ACCESS,0,NULL}, +#endif #endif {miim_end,} }, diff --git a/drivers/net/tsec.h b/drivers/net/tsec.h index cfa7d1aad77..597ea1d3c7f 100644 --- a/drivers/net/tsec.h +++ b/drivers/net/tsec.h @@ -112,6 +112,8 @@ #define MIIM_GBIT_CONTROL 0x9 #define MIIM_GBIT_CONTROL_INIT 0xe00 +#define MIIM_EXT_PAGE_ACCESS 0x1f + /* Broadcom BCM54xx -- taken from linux sungem_phy */ #define MIIM_BCM54xx_AUXSTATUS 0x19 #define MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK 0x0700 @@ -161,8 +163,9 @@ /* Entry for Vitesse VSC8601 regs starts here (Not complete) */ /* Vitesse VSC8601 Extended PHY Control Register 1 */ -#define MIIM_VSC8601_EPHY_CON 0x17 +#define MIIM_VSC8601_EPHY_CON 0x17 #define MIIM_VSC8601_EPHY_CON_INIT_SKEW 0x1120 +#define MIIM_VSC8601_SKEW_CTRL 0x1c /* 88E1011 PHY Status Register */ #define MIIM_88E1011_PHY_STATUS 0x11 @@ -177,9 +180,9 @@ #define MIIM_88E1011_PHY_MDI_X_AUTO 0x0060 /* 88E1111 PHY LED Control Register */ -#define MIIM_88E1111_PHY_LED_CONTROL 24 -#define MIIM_88E1111_PHY_LED_DIRECT 0x4100 -#define MIIM_88E1111_PHY_LED_COMBINE 0x411C +#define MIIM_88E1111_PHY_LED_CONTROL 24 +#define MIIM_88E1111_PHY_LED_DIRECT 0x4100 +#define MIIM_88E1111_PHY_LED_COMBINE 0x411C /* 88E1145 Extended PHY Specific Control Register */ #define MIIM_88E1145_PHY_EXT_CR 20 |