diff options
author | Tom Rini <trini@konsulko.com> | 2022-07-07 14:12:07 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2022-07-07 14:29:37 -0400 |
commit | ea92f95d630cba9c3a324d250258ad2e35d9c997 (patch) | |
tree | 68ad93bb452ccf3873a9b457a8cca9ea7e3c1916 /drivers | |
parent | cb9843bda3e500eb4add1927be4ed72077a69774 (diff) | |
parent | c45568cc4e51b7bbe2f3ce28d8f2566048aeebf3 (diff) |
Merge branch '2022-07-07-Kconfig-migrations-dead-code-removal' into next
- Migrate more CONFIG options to Kconfig and remove some unused code
while we're at it.
Diffstat (limited to 'drivers')
32 files changed, 110 insertions, 2327 deletions
diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 66ce4cc29ba..e918f746946 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -237,4 +237,15 @@ config SYS_BOOTCOUNT_MAGIC help Set the magic value used for the boot counter. +choice + prompt "Endianness of bootcount accessors" + default SYS_BOOTCOUNT_LE + +config SYS_BOOTCOUNT_LE + bool "Little endian accessors" + +config SYS_BOOTCOUNT_BE + bool "Big endian accessors" + +endchoice endif diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index f10d1aaf4b6..eae1c8ddc9f 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -3,7 +3,7 @@ config FIRMWARE config SPL_FIRMWARE bool "Enable Firmware driver support in SPL" - depends on FIRMWARE + depends on FIRMWARE && SPL config SPL_ARM_PSCI_FW bool diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 149a62ffe61..8ab22ed8173 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -89,7 +89,7 @@ config DM_GPIO_LOOKUP_LABEL config SPL_DM_GPIO_LOOKUP_LABEL bool "Enable searching for gpio labelnames" - depends on DM_GPIO && SPL_DM && SPL_GPIO + depends on SPL_DM_GPIO help This option enables searching for gpio names in the defined gpio labels, if the search for the @@ -490,7 +490,7 @@ config DM_PCA953X config SPL_DM_PCA953X bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports in SPL" - depends on DM_GPIO + depends on SPL_DM_GPIO help Say yes here to provide access to several register-oriented SMBus I/O expanders, made mostly by NXP or TI. Compatible diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig index 39683fc43b4..323c4fbe9cc 100644 --- a/drivers/i2c/muxes/Kconfig +++ b/drivers/i2c/muxes/Kconfig @@ -9,7 +9,7 @@ config I2C_MUX config SPL_I2C_MUX bool "Support I2C multiplexers on SPL" - depends on I2C_MUX + depends on SPL && I2C_MUX help This enables I2C buses to be multiplexed, so that you can select one of several buses using some sort of control mechanism. The diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig index 418ed215c57..ccdd7d7395c 100644 --- a/drivers/led/Kconfig +++ b/drivers/led/Kconfig @@ -67,7 +67,7 @@ config LED_BLINK config SPL_LED bool "Enable LED support in SPL" - depends on SPL && SPL_DM + depends on SPL_DM help The LED subsystem adds a small amount of overhead to the image. If this is acceptable and you have a need to use LEDs in SPL, @@ -85,7 +85,7 @@ config LED_GPIO config SPL_LED_GPIO bool "LED support for GPIO-connected LEDs in SPL" - depends on SPL_LED && DM_GPIO + depends on SPL_LED && SPL_DM_GPIO help This option is an SPL-variant of the LED_GPIO option. See the help of LED_GPIO for details. diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index b44cd98150f..6ff00a7cbd3 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -123,6 +123,7 @@ config MMC_IO_VOLTAGE config SPL_MMC_IO_VOLTAGE bool "Support IO voltage configuration in SPL" + depends on SPL_MMC help IO voltage configuration allows selecting the voltage level of the IO lines (not the level of main supply). This is required for UHS @@ -153,6 +154,7 @@ config MMC_HS400_ES_SUPPORT config SPL_MMC_HS400_ES_SUPPORT bool "enable HS400 Enhanced Strobe support in SPL" + depends on SPL_MMC help The HS400 Enhanced Strobe mode is support by some eMMC. The bus frequency is up to 200MHz. This mode does not tune the IO. @@ -166,6 +168,7 @@ config MMC_HS400_SUPPORT config SPL_MMC_HS400_SUPPORT bool "enable HS400 support in SPL" + depends on SPL_MMC select SPL_MMC_HS200_SUPPORT help The HS400 mode is support by some eMMC. The bus frequency is up to @@ -179,6 +182,7 @@ config MMC_HS200_SUPPORT config SPL_MMC_HS200_SUPPORT bool "enable HS200 support in SPL" + depends on SPL_MMC help The HS200 mode is support by some eMMC. The bus frequency is up to 200MHz. This mode requires tuning the IO. @@ -342,14 +346,6 @@ config MVEBU_MMC If unsure, say N. -config PXA_MMC_GENERIC - bool "Support for MMC controllers on PXA" - help - This selects MMC controllers on PXA. - If you are on a PXA architecture, say Y here. - - If unsure, say N. - config MMC_OMAP_HS bool "TI OMAP High Speed Multimedia Card Interface support" select DM_REGULATOR_PBIAS if DM_MMC && DM_REGULATOR @@ -478,7 +474,7 @@ config MMC_SDHCI_ADMA config SPL_MMC_SDHCI_ADMA bool "Support SDHCI ADMA2 in SPL" - depends on MMC_SDHCI + depends on SPL_MMC && MMC_SDHCI select MMC_SDHCI_ADMA_HELPERS help This enables support for the ADMA (Advanced DMA) defined diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 96275093022..7c4243289c4 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -46,7 +46,6 @@ obj-$(CONFIG_MMC_MXS) += mxsmmc.o obj-$(CONFIG_MMC_OCTEONTX) += octeontx_hsmmc.o obj-$(CONFIG_MMC_OWL) += owl_mmc.o obj-$(CONFIG_MMC_PCI) += pci_mmc.o -obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o obj-$(CONFIG_$(SPL_TPL_)SUPPORT_EMMC_RPMB) += rpmb.o obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_gen.c deleted file mode 100644 index a0e1a76d571..00000000000 --- a/drivers/mmc/pxa_mmc_gen.c +++ /dev/null @@ -1,531 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> - * - * Modified to add driver model (DM) support - * Copyright (C) 2019 Marcel Ziswiler <marcel@ziswiler.com> - * - * Loosely based on the old code and Linux's PXA MMC driver - */ - -#include <common.h> -#include <asm/arch/hardware.h> -#include <asm/arch/regs-mmc.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <asm/io.h> -#include <dm.h> -#include <dm/platform_data/pxa_mmc_gen.h> -#include <malloc.h> -#include <mmc.h> - -/* PXAMMC Generic default config for various CPUs */ -#if defined(CONFIG_CPU_PXA27X) -#define PXAMMC_CRC_SKIP -#define PXAMMC_FIFO_SIZE 32 -#define PXAMMC_MIN_SPEED 304000 -#define PXAMMC_MAX_SPEED 19500000 -#define PXAMMC_HOST_CAPS (MMC_MODE_4BIT) -#elif defined(CONFIG_CPU_MONAHANS) -#define PXAMMC_FIFO_SIZE 32 -#define PXAMMC_MIN_SPEED 304000 -#define PXAMMC_MAX_SPEED 26000000 -#define PXAMMC_HOST_CAPS (MMC_MODE_4BIT | MMC_MODE_HS) -#else -#error "This CPU isn't supported by PXA MMC!" -#endif - -#define MMC_STAT_ERRORS \ - (MMC_STAT_RES_CRC_ERROR | MMC_STAT_SPI_READ_ERROR_TOKEN | \ - MMC_STAT_CRC_READ_ERROR | MMC_STAT_TIME_OUT_RESPONSE | \ - MMC_STAT_READ_TIME_OUT | MMC_STAT_CRC_WRITE_ERROR) - -/* 1 millisecond (in wait cycles below it's 100 x 10uS waits) */ -#define PXA_MMC_TIMEOUT 100 - -struct pxa_mmc_priv { - struct pxa_mmc_regs *regs; -}; - -/* Wait for bit to be set */ -static int pxa_mmc_wait(struct mmc *mmc, uint32_t mask) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - unsigned int timeout = PXA_MMC_TIMEOUT; - - /* Wait for bit to be set */ - while (--timeout) { - if (readl(®s->stat) & mask) - break; - udelay(10); - } - - if (!timeout) - return -ETIMEDOUT; - - return 0; -} - -static int pxa_mmc_stop_clock(struct mmc *mmc) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - unsigned int timeout = PXA_MMC_TIMEOUT; - - /* If the clock aren't running, exit */ - if (!(readl(®s->stat) & MMC_STAT_CLK_EN)) - return 0; - - /* Tell the controller to turn off the clock */ - writel(MMC_STRPCL_STOP_CLK, ®s->strpcl); - - /* Wait until the clock are off */ - while (--timeout) { - if (!(readl(®s->stat) & MMC_STAT_CLK_EN)) - break; - udelay(10); - } - - /* The clock refused to stop, scream and die a painful death */ - if (!timeout) - return -ETIMEDOUT; - - /* The clock stopped correctly */ - return 0; -} - -static int pxa_mmc_start_cmd(struct mmc *mmc, struct mmc_cmd *cmd, - uint32_t cmdat) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - int ret; - - /* The card can send a "busy" response */ - if (cmd->resp_type & MMC_RSP_BUSY) - cmdat |= MMC_CMDAT_BUSY; - - /* Inform the controller about response type */ - switch (cmd->resp_type) { - case MMC_RSP_R1: - case MMC_RSP_R1b: - cmdat |= MMC_CMDAT_R1; - break; - case MMC_RSP_R2: - cmdat |= MMC_CMDAT_R2; - break; - case MMC_RSP_R3: - cmdat |= MMC_CMDAT_R3; - break; - default: - break; - } - - /* Load command and it's arguments into the controller */ - writel(cmd->cmdidx, ®s->cmd); - writel(cmd->cmdarg >> 16, ®s->argh); - writel(cmd->cmdarg & 0xffff, ®s->argl); - writel(cmdat, ®s->cmdat); - - /* Start the controller clock and wait until they are started */ - writel(MMC_STRPCL_START_CLK, ®s->strpcl); - - ret = pxa_mmc_wait(mmc, MMC_STAT_CLK_EN); - if (ret) - return ret; - - /* Correct and happy end */ - return 0; -} - -static int pxa_mmc_cmd_done(struct mmc *mmc, struct mmc_cmd *cmd) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - u32 a, b, c; - int i; - int stat; - - /* Read the controller status */ - stat = readl(®s->stat); - - /* - * Linux says: - * Did I mention this is Sick. We always need to - * discard the upper 8 bits of the first 16-bit word. - */ - a = readl(®s->res) & 0xffff; - for (i = 0; i < 4; i++) { - b = readl(®s->res) & 0xffff; - c = readl(®s->res) & 0xffff; - cmd->response[i] = (a << 24) | (b << 8) | (c >> 8); - a = c; - } - - /* The command response didn't arrive */ - if (stat & MMC_STAT_TIME_OUT_RESPONSE) { - return -ETIMEDOUT; - } else if (stat & MMC_STAT_RES_CRC_ERROR && - cmd->resp_type & MMC_RSP_CRC) { -#ifdef PXAMMC_CRC_SKIP - if (cmd->resp_type & MMC_RSP_136 && - cmd->response[0] & (1 << 31)) - printf("Ignoring CRC, this may be dangerous!\n"); - else -#endif - return -EILSEQ; - } - - /* The command response was successfully read */ - return 0; -} - -static int pxa_mmc_do_read_xfer(struct mmc *mmc, struct mmc_data *data) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - u32 len; - u32 *buf = (uint32_t *)data->dest; - int size; - int ret; - - len = data->blocks * data->blocksize; - - while (len) { - /* The controller has data ready */ - if (readl(®s->i_reg) & MMC_I_REG_RXFIFO_RD_REQ) { - size = min(len, (uint32_t)PXAMMC_FIFO_SIZE); - len -= size; - size /= 4; - - /* Read data into the buffer */ - while (size--) - *buf++ = readl(®s->rxfifo); - } - - if (readl(®s->stat) & MMC_STAT_ERRORS) - return -EIO; - } - - /* Wait for the transmission-done interrupt */ - ret = pxa_mmc_wait(mmc, MMC_STAT_DATA_TRAN_DONE); - if (ret) - return ret; - - return 0; -} - -static int pxa_mmc_do_write_xfer(struct mmc *mmc, struct mmc_data *data) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - u32 len; - u32 *buf = (uint32_t *)data->src; - int size; - int ret; - - len = data->blocks * data->blocksize; - - while (len) { - /* The controller is ready to receive data */ - if (readl(®s->i_reg) & MMC_I_REG_TXFIFO_WR_REQ) { - size = min(len, (uint32_t)PXAMMC_FIFO_SIZE); - len -= size; - size /= 4; - - while (size--) - writel(*buf++, ®s->txfifo); - - if (min(len, (uint32_t)PXAMMC_FIFO_SIZE) < 32) - writel(MMC_PRTBUF_BUF_PART_FULL, ®s->prtbuf); - } - - if (readl(®s->stat) & MMC_STAT_ERRORS) - return -EIO; - } - - /* Wait for the transmission-done interrupt */ - ret = pxa_mmc_wait(mmc, MMC_STAT_DATA_TRAN_DONE); - if (ret) - return ret; - - /* Wait until the data are really written to the card */ - ret = pxa_mmc_wait(mmc, MMC_STAT_PRG_DONE); - if (ret) - return ret; - - return 0; -} - -static int pxa_mmc_send_cmd_common(struct pxa_mmc_priv *priv, struct mmc *mmc, - struct mmc_cmd *cmd, struct mmc_data *data) -{ - struct pxa_mmc_regs *regs = priv->regs; - u32 cmdat = 0; - int ret; - - /* Stop the controller */ - ret = pxa_mmc_stop_clock(mmc); - if (ret) - return ret; - - /* If we're doing data transfer, configure the controller accordingly */ - if (data) { - writel(data->blocks, ®s->nob); - writel(data->blocksize, ®s->blklen); - /* This delay can be optimized, but stick with max value */ - writel(0xffff, ®s->rdto); - cmdat |= MMC_CMDAT_DATA_EN; - if (data->flags & MMC_DATA_WRITE) - cmdat |= MMC_CMDAT_WRITE; - } - - /* Run in 4bit mode if the card can do it */ - if (mmc->bus_width == 4) - cmdat |= MMC_CMDAT_SD_4DAT; - - /* Execute the command */ - ret = pxa_mmc_start_cmd(mmc, cmd, cmdat); - if (ret) - return ret; - - /* Wait until the command completes */ - ret = pxa_mmc_wait(mmc, MMC_STAT_END_CMD_RES); - if (ret) - return ret; - - /* Read back the result */ - ret = pxa_mmc_cmd_done(mmc, cmd); - if (ret) - return ret; - - /* In case there was a data transfer scheduled, do it */ - if (data) { - if (data->flags & MMC_DATA_WRITE) - pxa_mmc_do_write_xfer(mmc, data); - else - pxa_mmc_do_read_xfer(mmc, data); - } - - return 0; -} - -static int pxa_mmc_set_ios_common(struct pxa_mmc_priv *priv, struct mmc *mmc) -{ - struct pxa_mmc_regs *regs = priv->regs; - u32 tmp; - u32 pxa_mmc_clock; - - if (!mmc->clock) { - pxa_mmc_stop_clock(mmc); - return 0; - } - - /* PXA3xx can do 26MHz with special settings. */ - if (mmc->clock == 26000000) { - writel(0x7, ®s->clkrt); - return 0; - } - - /* Set clock to the card the usual way. */ - pxa_mmc_clock = 0; - tmp = mmc->cfg->f_max / mmc->clock; - tmp += tmp % 2; - - while (tmp > 1) { - pxa_mmc_clock++; - tmp >>= 1; - } - - writel(pxa_mmc_clock, ®s->clkrt); - - return 0; -} - -static int pxa_mmc_init_common(struct pxa_mmc_priv *priv, struct mmc *mmc) -{ - struct pxa_mmc_regs *regs = priv->regs; - - /* Make sure the clock are stopped */ - pxa_mmc_stop_clock(mmc); - - /* Turn off SPI mode */ - writel(0, ®s->spi); - - /* Set up maximum timeout to wait for command response */ - writel(MMC_RES_TO_MAX_MASK, ®s->resto); - - /* Mask all interrupts */ - writel(~(MMC_I_MASK_TXFIFO_WR_REQ | MMC_I_MASK_RXFIFO_RD_REQ), - ®s->i_mask); - - return 0; -} - -#if !CONFIG_IS_ENABLED(DM_MMC) -static int pxa_mmc_init(struct mmc *mmc) -{ - struct pxa_mmc_priv *priv = mmc->priv; - - return pxa_mmc_init_common(priv, mmc); -} - -static int pxa_mmc_request(struct mmc *mmc, struct mmc_cmd *cmd, - struct mmc_data *data) -{ - struct pxa_mmc_priv *priv = mmc->priv; - - return pxa_mmc_send_cmd_common(priv, mmc, cmd, data); -} - -static int pxa_mmc_set_ios(struct mmc *mmc) -{ - struct pxa_mmc_priv *priv = mmc->priv; - - return pxa_mmc_set_ios_common(priv, mmc); -} - -static const struct mmc_ops pxa_mmc_ops = { - .send_cmd = pxa_mmc_request, - .set_ios = pxa_mmc_set_ios, - .init = pxa_mmc_init, -}; - -static struct mmc_config pxa_mmc_cfg = { - .name = "PXA MMC", - .ops = &pxa_mmc_ops, - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .f_max = PXAMMC_MAX_SPEED, - .f_min = PXAMMC_MIN_SPEED, - .host_caps = PXAMMC_HOST_CAPS, - .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, -}; - -int pxa_mmc_register(int card_index) -{ - struct mmc *mmc; - struct pxa_mmc_priv *priv; - u32 reg; - int ret = -ENOMEM; - - priv = malloc(sizeof(struct pxa_mmc_priv)); - if (!priv) - goto err0; - - memset(priv, 0, sizeof(*priv)); - - switch (card_index) { - case 0: - priv->regs = (struct pxa_mmc_regs *)MMC0_BASE; - break; - case 1: - priv->regs = (struct pxa_mmc_regs *)MMC1_BASE; - break; - default: - ret = -EINVAL; - printf("PXA MMC: Invalid MMC controller ID (card_index = %d)\n", - card_index); - goto err1; - } - -#ifndef CONFIG_CPU_MONAHANS /* PXA2xx */ - reg = readl(CKEN); - reg |= CKEN12_MMC; - writel(reg, CKEN); -#else /* PXA3xx */ - reg = readl(CKENA); - reg |= CKENA_12_MMC0 | CKENA_13_MMC1; - writel(reg, CKENA); -#endif - - mmc = mmc_create(&pxa_mmc_cfg, priv); - if (!mmc) - goto err1; - - return 0; - -err1: - free(priv); -err0: - return ret; -} -#else /* !CONFIG_IS_ENABLED(DM_MMC) */ -static int pxa_mmc_probe(struct udevice *dev) -{ - struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); - struct pxa_mmc_plat *plat = dev_get_plat(dev); - struct mmc_config *cfg = &plat->cfg; - struct mmc *mmc = &plat->mmc; - struct pxa_mmc_priv *priv = dev_get_priv(dev); - u32 reg; - - upriv->mmc = mmc; - - cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; - cfg->f_max = PXAMMC_MAX_SPEED; - cfg->f_min = PXAMMC_MIN_SPEED; - cfg->host_caps = PXAMMC_HOST_CAPS; - cfg->name = dev->name; - cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; - - mmc->priv = priv; - - priv->regs = plat->base; - -#ifndef CONFIG_CPU_MONAHANS /* PXA2xx */ - reg = readl(CKEN); - reg |= CKEN12_MMC; - writel(reg, CKEN); -#else /* PXA3xx */ - reg = readl(CKENA); - reg |= CKENA_12_MMC0 | CKENA_13_MMC1; - writel(reg, CKENA); -#endif - - return pxa_mmc_init_common(priv, mmc); -} - -static int pxa_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, - struct mmc_data *data) -{ - struct pxa_mmc_plat *plat = dev_get_plat(dev); - struct pxa_mmc_priv *priv = dev_get_priv(dev); - - return pxa_mmc_send_cmd_common(priv, &plat->mmc, cmd, data); -} - -static int pxa_mmc_set_ios(struct udevice *dev) -{ - struct pxa_mmc_plat *plat = dev_get_plat(dev); - struct pxa_mmc_priv *priv = dev_get_priv(dev); - - return pxa_mmc_set_ios_common(priv, &plat->mmc); -} - -static const struct dm_mmc_ops pxa_mmc_ops = { - .get_cd = NULL, - .send_cmd = pxa_mmc_send_cmd, - .set_ios = pxa_mmc_set_ios, -}; - -#if CONFIG_IS_ENABLED(BLK) -static int pxa_mmc_bind(struct udevice *dev) -{ - struct pxa_mmc_plat *plat = dev_get_plat(dev); - - return mmc_bind(dev, &plat->mmc, &plat->cfg); -} -#endif - -U_BOOT_DRIVER(pxa_mmc) = { -#if CONFIG_IS_ENABLED(BLK) - .bind = pxa_mmc_bind, -#endif - .id = UCLASS_MMC, - .name = "pxa_mmc", - .ops = &pxa_mmc_ops, - .priv_auto = sizeof(struct pxa_mmc_priv), - .probe = pxa_mmc_probe, -}; -#endif /* !CONFIG_IS_ENABLED(DM_MMC) */ diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 4129a33866b..190300fc179 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -73,6 +73,7 @@ config PMECC_SECTOR_SIZE config SPL_GENERATE_ATMEL_PMECC_HEADER bool "Atmel PMECC Header Generation" + depends on SPL select ATMEL_NAND_HWECC select ATMEL_NAND_HW_PMECC help @@ -647,7 +648,7 @@ config SYS_NAND_U_BOOT_OFFS_REDUND config SPL_NAND_AM33XX_BCH bool "Enables SPL-NAND driver which supports ELM based" - depends on NAND_OMAP_GPMC && !OMAP34XX + depends on SPL_NAND_SUPPORT && NAND_OMAP_GPMC && !OMAP34XX default y help Hardware ECC correction. This is useful for platforms which have ELM @@ -658,6 +659,7 @@ config SPL_NAND_AM33XX_BCH config SPL_NAND_DENALI bool "Support Denali NAND controller for SPL" + depends on SPL_NAND_SUPPORT help This is a small implementation of the Denali NAND controller for use on SPL. @@ -673,7 +675,7 @@ config NAND_DENALI_SPARE_AREA_SKIP_BYTES config SPL_NAND_SIMPLE bool "Use simple SPL NAND driver" - depends on !SPL_NAND_AM33XX_BCH + depends on !SPL_NAND_AM33XX_BCH && SPL_NAND_SUPPORT help Support for NAND boot using simple NAND drivers that expose the cmd_ctrl() interface. diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index f350c7e5dc2..f83876c5761 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -248,7 +248,7 @@ config SPI_FLASH_MTD config SPL_SPI_FLASH_MTD bool "SPI flash MTD support for SPL" - depends on SPI_FLASH + depends on SPI_FLASH && SPL help Enable the MTD support for the SPI flash layer in SPL. diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 40b5c8274e9..b671e72580e 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -400,19 +400,27 @@ config FTGMAC100 offers high-priority transmit queue for QoS and CoS applications. +config SYS_DISCOVER_PHY + bool config MCFFEC bool "ColdFire Ethernet Support" depends on DM_ETH select PHYLIB + select SYS_DISCOVER_PHY help This driver supports the network interface units in the ColdFire family. +config SYS_UNIFY_CACHE + depends on MCFFEC + bool "Invalidate icache during ethernet operations" + config FSLDMAFEC bool "ColdFire DMA Ethernet Support" depends on DM_ETH select PHYLIB + select SYS_DISCOVER_PHY help This driver supports the network interface units in the ColdFire family. @@ -728,6 +736,7 @@ config MPC8XX_FEC bool "Fast Ethernet Controller on MPC8XX" depends on MPC8xx select MII + select SYS_DISCOVER_PHY help This driver implements support for the Fast Ethernet Controller on MPC8XX diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c index e103f79305e..6825f9e27c0 100644 --- a/drivers/net/fsl_mcdmafec.c +++ b/drivers/net/fsl_mcdmafec.c @@ -243,16 +243,8 @@ static int fec_init(struct udevice *dev) fecpin_setclear(info, 1); fec_halt(dev); -#if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \ - defined (CONFIG_SYS_DISCOVER_PHY) - mii_init(); set_fec_duplex_speed(fecp, info->dup_spd); -#else -#ifndef CONFIG_SYS_DISCOVER_PHY - set_fec_duplex_speed(fecp, (FECDUPLEX << 16) | FECSPEED); -#endif /* ifndef CONFIG_SYS_DISCOVER_PHY */ -#endif /* CONFIG_CMD_MII || CONFIG_MII */ /* We use strictly polling mode only */ fecp->eimr = 0; diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index cef9eecac21..4dd848932b9 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -278,17 +278,9 @@ int mcffec_init(struct udevice *dev) fecpin_setclear(info, 1); fec_reset(info); -#if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \ - defined (CONFIG_SYS_DISCOVER_PHY) - mii_init(); set_fec_duplex_speed(fecp, info->dup_spd); -#else -#ifndef CONFIG_SYS_DISCOVER_PHY - set_fec_duplex_speed(fecp, (FECDUPLEX << 16) | FECSPEED); -#endif /* ifndef CONFIG_SYS_DISCOVER_PHY */ -#endif /* CONFIG_CMD_MII || CONFIG_MII */ /* We use strictly polling mode only */ fecp->eimr = 0; diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 2c20dc7c831..bc47cf144dd 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -29,6 +29,7 @@ config POWER_LEGACY config SPL_POWER_LEGACY bool "Legacy power support in SPL" + depends on SPL && !SPL_DM_PMIC default y if POWER_LEGACY help Note: This is a legacy option. Use SPL_DM_PMIC instead. @@ -425,6 +426,10 @@ config POWER_MT6323 This adds poweroff driver for mt6323 this pmic is used on mt7623 / Bananapi R2 +config PALMAS_POWER + bool "Palmas power support" + depends on OMAP54XX + config POWER_I2C bool "I2C-based power control for legacy power" depends on POWER_LEGACY diff --git a/drivers/power/acpi_pmc/Kconfig b/drivers/power/acpi_pmc/Kconfig index 355d1618c61..629acb07142 100644 --- a/drivers/power/acpi_pmc/Kconfig +++ b/drivers/power/acpi_pmc/Kconfig @@ -8,6 +8,7 @@ config ACPI_PMC config SPL_ACPI_PMC bool "Power Manager (x86 PMC) support in SPL" + depends on SPL default y if ACPI_PMC help Enable support for an x86-style power-management controller which diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index d6cea8ec666..c519e066ef0 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -55,7 +55,7 @@ config DM_REGULATOR_BD71837 config SPL_DM_REGULATOR_BD71837 bool "Enable Driver Model for ROHM BD71837/BD71847 regulators in SPL" - depends on DM_REGULATOR_BD71837 + depends on DM_REGULATOR_BD71837 && SPL help This config enables implementation of driver-model regulator uclass features for regulators on ROHM BD71837 and BD71847 in SPL. @@ -70,7 +70,7 @@ config DM_REGULATOR_PCA9450 config SPL_DM_REGULATOR_PCA9450 bool "Enable Driver Model for NXP PCA9450 regulators in SPL" - depends on DM_REGULATOR_PCA9450 + depends on DM_REGULATOR_PCA9450 && SPL help This config enables implementation of driver-model regulator uclass features for regulators on ROHM PCA9450 in SPL. @@ -115,7 +115,7 @@ config REGULATOR_PWM config SPL_REGULATOR_PWM bool "Enable Driver for PWM regulators in SPL" - depends on REGULATOR_PWM + depends on REGULATOR_PWM && SPL help This config enables implementation of driver-model regulator uclass features for PWM regulators in SPL. @@ -163,7 +163,7 @@ config DM_REGULATOR_FIXED config SPL_DM_REGULATOR_FIXED bool "Enable Driver Model for REGULATOR Fixed value in SPL" - depends on DM_REGULATOR_FIXED + depends on DM_REGULATOR_FIXED && SPL select SPL_DM_REGULATOR_COMMON ---help--- This config enables implementation of driver-model regulator uclass @@ -345,7 +345,7 @@ config SPL_DM_REGULATOR_STPMIC1 config SPL_DM_REGULATOR_PALMAS bool "Enable driver for PALMAS PMIC regulators" - depends on SPL_PMIC_PALMAS + depends on SPL_PMIC_PALMAS help This enables implementation of driver-model regulator uclass features for REGULATOR PALMAS and the family of PALMAS PMICs. @@ -353,7 +353,7 @@ config SPL_DM_REGULATOR_PALMAS config SPL_DM_REGULATOR_LP87565 bool "Enable driver for LP87565 PMIC regulators" - depends on SPL_PMIC_LP87565 + depends on SPL_PMIC_LP87565 help This enables implementation of driver-model regulator uclass features for REGULATOR LP87565 and the family of LP87565 PMICs. diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index f585622fdb7..de02e08a299 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -940,12 +940,6 @@ config OWL_SERIAL serial port, say Y to this option. If unsure, say N. Single baudrate is supported in current implementation (115200). -config PXA_SERIAL - bool "PXA serial port support" - help - If you have a machine based on a Marvell XScale PXA2xx CPU you - can enable its onboard serial ports by enabling this option. - config HTIF_CONSOLE bool "RISC-V HTIF console support" depends on DM_SERIAL && 64BIT diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 51de06a78c5..eb7b8f23ee9 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -43,7 +43,6 @@ obj-$(CONFIG_MCFUART) += serial_mcf.o obj-$(CONFIG_SYS_NS16550) += ns16550.o obj-$(CONFIG_S5P_SERIAL) += serial_s5p.o obj-$(CONFIG_MXC_UART) += serial_mxc.o -obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o obj-$(CONFIG_MESON_SERIAL) += serial_meson.o obj-$(CONFIG_INTEL_MID_SERIAL) += serial_intel_mid.o obj-$(CONFIG_ROCKCHIP_SERIAL) += serial_rockchip.o diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_pxa.c deleted file mode 100644 index aa928efdc00..00000000000 --- a/drivers/serial/serial_pxa.c +++ /dev/null @@ -1,342 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> - * - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Alex Zuepke <azu@sysgo.de> - * - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) - * - * Modified to add driver model (DM) support - * (C) Copyright 2016 Marcel Ziswiler <marcel.ziswiler@toradex.com> - */ - -#include <common.h> -#include <hang.h> -#include <asm/arch/pxa-regs.h> -#include <asm/arch/regs-uart.h> -#include <asm/global_data.h> -#include <asm/io.h> -#include <dm.h> -#include <dm/platform_data/serial_pxa.h> -#include <linux/compiler.h> -#include <serial.h> -#include <watchdog.h> - -DECLARE_GLOBAL_DATA_PTR; - -static uint32_t pxa_uart_get_baud_divider(int baudrate) -{ - return 921600 / baudrate; -} - -static void pxa_uart_toggle_clock(uint32_t uart_index, int enable) -{ - uint32_t clk_reg, clk_offset, reg; - - clk_reg = UART_CLK_REG; - clk_offset = UART_CLK_BASE << uart_index; - - reg = readl(clk_reg); - - if (enable) - reg |= clk_offset; - else - reg &= ~clk_offset; - - writel(reg, clk_reg); -} - -/* - * Enable clock and set baud rate, parity etc. - */ -void pxa_setbrg_common(struct pxa_uart_regs *uart_regs, int port, int baudrate) -{ - uint32_t divider = pxa_uart_get_baud_divider(baudrate); - if (!divider) - hang(); - - - pxa_uart_toggle_clock(port, 1); - - /* Disable interrupts and FIFOs */ - writel(0, &uart_regs->ier); - writel(0, &uart_regs->fcr); - - /* Set baud rate */ - writel(LCR_WLS0 | LCR_WLS1 | LCR_DLAB, &uart_regs->lcr); - writel(divider & 0xff, &uart_regs->dll); - writel(divider >> 8, &uart_regs->dlh); - writel(LCR_WLS0 | LCR_WLS1, &uart_regs->lcr); - - /* Enable UART */ - writel(IER_UUE, &uart_regs->ier); -} - -#ifndef CONFIG_DM_SERIAL -static struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index) -{ - switch (uart_index) { - case FFUART_INDEX: return (struct pxa_uart_regs *)FFUART_BASE; - case BTUART_INDEX: return (struct pxa_uart_regs *)BTUART_BASE; - case STUART_INDEX: return (struct pxa_uart_regs *)STUART_BASE; - default: - return NULL; - } -} - -/* - * Enable clock and set baud rate, parity etc. - */ -void pxa_setbrg_dev(uint32_t uart_index) -{ - struct pxa_uart_regs *uart_regs = pxa_uart_index_to_regs(uart_index); - if (!uart_regs) - panic("Failed getting UART registers\n"); - - pxa_setbrg_common(uart_regs, uart_index, gd->baudrate); -} - -/* - * Initialise the serial port with the given baudrate. The settings - * are always 8 data bits, no parity, 1 stop bit, no start bits. - */ -int pxa_init_dev(unsigned int uart_index) -{ - pxa_setbrg_dev(uart_index); - return 0; -} - -/* - * Output a single byte to the serial port. - */ -void pxa_putc_dev(unsigned int uart_index, const char c) -{ - struct pxa_uart_regs *uart_regs; - - /* If \n, also do \r */ - if (c == '\n') - pxa_putc_dev(uart_index, '\r'); - - uart_regs = pxa_uart_index_to_regs(uart_index); - if (!uart_regs) - hang(); - - while (!(readl(&uart_regs->lsr) & LSR_TEMT)) - WATCHDOG_RESET(); - writel(c, &uart_regs->thr); -} - -/* - * Read a single byte from the serial port. Returns 1 on success, 0 - * otherwise. When the function is succesfull, the character read is - * written into its argument c. - */ -int pxa_tstc_dev(unsigned int uart_index) -{ - struct pxa_uart_regs *uart_regs; - - uart_regs = pxa_uart_index_to_regs(uart_index); - if (!uart_regs) - return -1; - - return readl(&uart_regs->lsr) & LSR_DR; -} - -/* - * Read a single byte from the serial port. Returns 1 on success, 0 - * otherwise. When the function is succesfull, the character read is - * written into its argument c. - */ -int pxa_getc_dev(unsigned int uart_index) -{ - struct pxa_uart_regs *uart_regs; - - uart_regs = pxa_uart_index_to_regs(uart_index); - if (!uart_regs) - return -1; - - while (!(readl(&uart_regs->lsr) & LSR_DR)) - WATCHDOG_RESET(); - return readl(&uart_regs->rbr) & 0xff; -} - -void pxa_puts_dev(unsigned int uart_index, const char *s) -{ - while (*s) - pxa_putc_dev(uart_index, *s++); -} - -#define pxa_uart(uart, UART) \ - int uart##_init(void) \ - { \ - return pxa_init_dev(UART##_INDEX); \ - } \ - \ - void uart##_setbrg(void) \ - { \ - return pxa_setbrg_dev(UART##_INDEX); \ - } \ - \ - void uart##_putc(const char c) \ - { \ - return pxa_putc_dev(UART##_INDEX, c); \ - } \ - \ - void uart##_puts(const char *s) \ - { \ - return pxa_puts_dev(UART##_INDEX, s); \ - } \ - \ - int uart##_getc(void) \ - { \ - return pxa_getc_dev(UART##_INDEX); \ - } \ - \ - int uart##_tstc(void) \ - { \ - return pxa_tstc_dev(UART##_INDEX); \ - } \ - -#define pxa_uart_desc(uart) \ - struct serial_device serial_##uart##_device = \ - { \ - .name = "serial_"#uart, \ - .start = uart##_init, \ - .stop = NULL, \ - .setbrg = uart##_setbrg, \ - .getc = uart##_getc, \ - .tstc = uart##_tstc, \ - .putc = uart##_putc, \ - .puts = uart##_puts, \ - }; - -#define pxa_uart_multi(uart, UART) \ - pxa_uart(uart, UART) \ - pxa_uart_desc(uart) - -#if defined(CONFIG_HWUART) - pxa_uart_multi(hwuart, HWUART) -#endif -#if defined(CONFIG_STUART) - pxa_uart_multi(stuart, STUART) -#endif -#if defined(CONFIG_FFUART) - pxa_uart_multi(ffuart, FFUART) -#endif -#if defined(CONFIG_BTUART) - pxa_uart_multi(btuart, BTUART) -#endif - -__weak struct serial_device *default_serial_console(void) -{ -#if CONFIG_CONS_INDEX == 1 - return &serial_hwuart_device; -#elif CONFIG_CONS_INDEX == 2 - return &serial_stuart_device; -#elif CONFIG_CONS_INDEX == 3 - return &serial_ffuart_device; -#elif CONFIG_CONS_INDEX == 4 - return &serial_btuart_device; -#else -#error "Bad CONFIG_CONS_INDEX." -#endif -} - -void pxa_serial_initialize(void) -{ -#if defined(CONFIG_FFUART) - serial_register(&serial_ffuart_device); -#endif -#if defined(CONFIG_BTUART) - serial_register(&serial_btuart_device); -#endif -#if defined(CONFIG_STUART) - serial_register(&serial_stuart_device); -#endif -} -#endif /* CONFIG_DM_SERIAL */ - -#ifdef CONFIG_DM_SERIAL -static int pxa_serial_probe(struct udevice *dev) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - - pxa_setbrg_common((struct pxa_uart_regs *)plat->base, plat->port, - plat->baudrate); - return 0; -} - -static int pxa_serial_putc(struct udevice *dev, const char ch) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; - - /* Wait for last character to go. */ - if (!(readl(&uart_regs->lsr) & LSR_TEMT)) - return -EAGAIN; - - writel(ch, &uart_regs->thr); - - return 0; -} - -static int pxa_serial_getc(struct udevice *dev) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; - - /* Wait for a character to arrive. */ - if (!(readl(&uart_regs->lsr) & LSR_DR)) - return -EAGAIN; - - return readl(&uart_regs->rbr) & 0xff; -} - -int pxa_serial_setbrg(struct udevice *dev, int baudrate) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; - int port = plat->port; - - pxa_setbrg_common(uart_regs, port, baudrate); - - return 0; -} - -static int pxa_serial_pending(struct udevice *dev, bool input) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; - - if (input) - return readl(&uart_regs->lsr) & LSR_DR ? 1 : 0; - else - return readl(&uart_regs->lsr) & LSR_TEMT ? 0 : 1; - - return 0; -} - -static const struct dm_serial_ops pxa_serial_ops = { - .putc = pxa_serial_putc, - .pending = pxa_serial_pending, - .getc = pxa_serial_getc, - .setbrg = pxa_serial_setbrg, -}; - -U_BOOT_DRIVER(serial_pxa) = { - .name = "serial_pxa", - .id = UCLASS_SERIAL, - .probe = pxa_serial_probe, - .ops = &pxa_serial_ops, - .flags = DM_FLAG_PRE_RELOC, -}; -#endif /* CONFIG_DM_SERIAL */ diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h index 05b3c01e5fc..0d89fc085fb 100644 --- a/drivers/serial/usbtty.h +++ b/drivers/serial/usbtty.h @@ -13,8 +13,6 @@ #include <usbdevice.h> #if defined(CONFIG_PPC) #include <usb/mpc8xx_udc.h> -#elif defined(CONFIG_CPU_PXA27X) -#include <usb/pxa27x_udc.h> #elif defined(CONFIG_DW_UDC) #include <usb/designware_udc.h> #elif defined(CONFIG_CI_UDC) diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index d8de8efa0a4..306dd3127f4 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -43,6 +43,5 @@ ifdef CONFIG_USB_DEVICE obj-y += core.o obj-y += ep0.o obj-$(CONFIG_DW_UDC) += designware_udc.o -obj-$(CONFIG_CPU_PXA27X) += pxa27x_udc.o endif endif diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c index 01337d6511b..bb0d2971d06 100644 --- a/drivers/usb/gadget/epautoconf.c +++ b/drivers/usb/gadget/epautoconf.c @@ -79,12 +79,6 @@ static int ep_matches( */ if ('s' == tmp[2]) /* == "-iso" */ return 0; - /* for now, avoid PXA "interrupt-in"; - * it's documented as never using DATA1. - */ - if (gadget_is_pxa(gadget) - && 'i' == tmp[1]) - return 0; break; case USB_ENDPOINT_XFER_BULK: if ('b' != tmp[1]) /* != "-bulk" */ diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 43073286572..72b4f7f306a 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -1325,24 +1325,6 @@ eth_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) if (!cdc_active(dev) && wIndex != 0) break; - /* - * PXA hardware partially handles SET_INTERFACE; - * we need to kluge around that interference. - */ - if (gadget_is_pxa(gadget)) { - value = eth_set_config(dev, DEV_CONFIG_VALUE, - GFP_ATOMIC); - /* - * PXA25x driver use non-CDC ethernet gadget. - * But only _CDC and _RNDIS code can signalize - * that network is working. So we signalize it - * here. - */ - dev->network_started = 1; - debug("USB network up!\n"); - goto done_set_intf; - } - #ifdef CONFIG_USB_ETH_CDC switch (wIndex) { case 0: /* control/master intf */ @@ -1386,8 +1368,6 @@ eth_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) */ debug("set_interface ignored!\n"); #endif /* CONFIG_USB_ETH_CDC */ - -done_set_intf: break; case USB_REQ_GET_INTERFACE: if (ctrl->bRequestType != (USB_DIR_IN|USB_RECIP_INTERFACE) @@ -2032,10 +2012,7 @@ static int eth_bind(struct usb_gadget *gadget) * standard protocol is _strongly_ preferred for interop purposes. * (By everyone except Microsoft.) */ - if (gadget_is_pxa(gadget)) { - /* pxa doesn't support altsettings */ - cdc = 0; - } else if (gadget_is_musbhdrc(gadget)) { + if (gadget_is_musbhdrc(gadget)) { /* reduce tx dma overhead by avoiding special cases */ zlp = 0; } else if (gadget_is_sh(gadget)) { diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index 06e6a489495..66ccd054172 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h @@ -32,12 +32,6 @@ #define gadget_is_dummy(g) 0 #endif -#ifdef CONFIG_USB_GADGET_PXA2XX -#define gadget_is_pxa(g) (!strcmp("pxa2xx_udc", (g)->name)) -#else -#define gadget_is_pxa(g) 0 -#endif - #ifdef CONFIG_USB_GADGET_GOKU #define gadget_is_goku(g) (!strcmp("goku_udc", (g)->name)) #else @@ -78,13 +72,6 @@ #define gadget_is_n9604(g) 0 #endif -/* various unstable versions available */ -#ifdef CONFIG_USB_GADGET_PXA27X -#define gadget_is_pxa27x(g) (!strcmp("pxa27x_udc", (g)->name)) -#else -#define gadget_is_pxa27x(g) 0 -#endif - #ifdef CONFIG_USB_GADGET_ATMEL_USBA #define gadget_is_atmel_usba(g) (!strcmp("atmel_usba_udc", (g)->name)) #else @@ -194,8 +181,6 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x01; else if (gadget_is_dummy(gadget)) return 0x02; - else if (gadget_is_pxa(gadget)) - return 0x03; else if (gadget_is_sh(gadget)) return 0x04; else if (gadget_is_sa1100(gadget)) @@ -208,8 +193,6 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x08; else if (gadget_is_n9604(gadget)) return 0x09; - else if (gadget_is_pxa27x(gadget)) - return 0x10; else if (gadget_is_at91(gadget)) return 0x12; else if (gadget_is_imx(gadget)) diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c deleted file mode 100644 index 583ceb4d55c..00000000000 --- a/drivers/usb/gadget/pxa27x_udc.c +++ /dev/null @@ -1,703 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * PXA27x USB device driver for u-boot. - * - * Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it> - * Copyright (C) 2007 Eurotech S.p.A. <info@eurotech.it> - * Copyright (C) 2008 Vivek Kutal <vivek.kutal@azingo.com> - */ - - -#include <common.h> -#include <asm/arch/hardware.h> -#include <asm/byteorder.h> -#include <asm/io.h> -#include <usbdevice.h> -#include <linux/delay.h> -#include <usb/pxa27x_udc.h> -#include <usb/udc.h> - -#include "ep0.h" - -/* number of endpoints on this UDC */ -#define UDC_MAX_ENDPOINTS 24 - -static struct urb *ep0_urb; -static struct usb_device_instance *udc_device; -static int ep0state = EP0_IDLE; - -#ifdef USBDDBG -static void udc_dump_buffer(char *name, u8 *buf, int len) -{ - usbdbg("%s - buf %p, len %d", name, buf, len); - print_buffer(0, buf, 1, len, 0); -} -#else -#define udc_dump_buffer(name, buf, len) /* void */ -#endif - -static inline void udc_ack_int_UDCCR(int mask) -{ - writel(readl(USIR1) | mask, USIR1); -} - -/* - * If the endpoint has an active tx_urb, then the next packet of data from the - * URB is written to the tx FIFO. - * The total amount of data in the urb is given by urb->actual_length. - * The maximum amount of data that can be sent in any one packet is given by - * endpoint->tx_packetSize. - * The number of data bytes from this URB that have already been transmitted - * is given by endpoint->sent. - * endpoint->last is updated by this routine with the number of data bytes - * transmitted in this packet. - */ -static int udc_write_urb(struct usb_endpoint_instance *endpoint) -{ - struct urb *urb = endpoint->tx_urb; - int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; - u32 *data32 = (u32 *) urb->buffer; - u8 *data8 = (u8 *) urb->buffer; - unsigned int i, n, w, b, is_short; - int timeout = 2000; /* 2ms */ - - if (!urb || !urb->actual_length) - return -1; - - n = min_t(unsigned int, urb->actual_length - endpoint->sent, - endpoint->tx_packetSize); - if (n <= 0) - return -1; - - usbdbg("write urb on ep %d", ep_num); -#if defined(USBDDBG) && defined(USBDPARANOIA) - usbdbg("urb: buf %p, buf_len %d, actual_len %d", - urb->buffer, urb->buffer_length, urb->actual_length); - usbdbg("endpoint: sent %d, tx_packetSize %d, last %d", - endpoint->sent, endpoint->tx_packetSize, endpoint->last); -#endif - - is_short = n != endpoint->tx_packetSize; - w = n / 4; - b = n % 4; - usbdbg("n %d%s w %d b %d", n, is_short ? "-s" : "", w, b); - udc_dump_buffer("urb write", data8 + endpoint->sent, n); - - /* Prepare for data send */ - if (ep_num) - writel(UDCCSR_PC ,UDCCSN(ep_num)); - - for (i = 0; i < w; i++) - writel(data32[endpoint->sent / 4 + i], UDCDN(ep_num)); - - for (i = 0; i < b; i++) - writeb(data8[endpoint->sent + w * 4 + i], UDCDN(ep_num)); - - /* Set "Packet Complete" if less data then tx_packetSize */ - if (is_short) - writel(ep_num ? UDCCSR_SP : UDCCSR0_IPR, UDCCSN(ep_num)); - - /* Wait for data sent */ - if (ep_num) { - while (!(readl(UDCCSN(ep_num)) & UDCCSR_PC)) { - if (timeout-- == 0) - return -1; - else - udelay(1); - } - } - - endpoint->last = n; - - if (ep_num) { - usbd_tx_complete(endpoint); - } else { - endpoint->sent += n; - endpoint->last -= n; - } - - if (endpoint->sent >= urb->actual_length) { - urb->actual_length = 0; - endpoint->sent = 0; - endpoint->last = 0; - } - - if ((endpoint->sent >= urb->actual_length) && (!ep_num)) { - usbdbg("ep0 IN stage done"); - if (is_short) - ep0state = EP0_IDLE; - else - ep0state = EP0_XFER_COMPLETE; - } - - return 0; -} - -static int udc_read_urb(struct usb_endpoint_instance *endpoint) -{ - struct urb *urb = endpoint->rcv_urb; - int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; - u32 *data32 = (u32 *) urb->buffer; - unsigned int i, n; - - usbdbg("read urb on ep %d", ep_num); -#if defined(USBDDBG) && defined(USBDPARANOIA) - usbdbg("urb: buf %p, buf_len %d, actual_len %d", - urb->buffer, urb->buffer_length, urb->actual_length); - usbdbg("endpoint: rcv_packetSize %d", - endpoint->rcv_packetSize); -#endif - - if (readl(UDCCSN(ep_num)) & UDCCSR_BNE) - n = readl(UDCBCN(ep_num)) & 0x3ff; - else /* zlp */ - n = 0; - - usbdbg("n %d%s", n, n != endpoint->rcv_packetSize ? "-s" : ""); - for (i = 0; i < n; i += 4) - data32[urb->actual_length / 4 + i / 4] = readl(UDCDN(ep_num)); - - udc_dump_buffer("urb read", (u8 *) data32, urb->actual_length + n); - usbd_rcv_complete(endpoint, n, 0); - - return 0; -} - -static int udc_read_urb_ep0(void) -{ - u32 *data32 = (u32 *) ep0_urb->buffer; - u8 *data8 = (u8 *) ep0_urb->buffer; - unsigned int i, n, w, b; - - usbdbg("read urb on ep 0"); -#if defined(USBDDBG) && defined(USBDPARANOIA) - usbdbg("urb: buf %p, buf_len %d, actual_len %d", - ep0_urb->buffer, ep0_urb->buffer_length, ep0_urb->actual_length); -#endif - - n = readl(UDCBCR0); - w = n / 4; - b = n % 4; - - for (i = 0; i < w; i++) { - data32[ep0_urb->actual_length / 4 + i] = readl(UDCDN(0)); - /* ep0_urb->actual_length += 4; */ - } - - for (i = 0; i < b; i++) { - data8[ep0_urb->actual_length + w * 4 + i] = readb(UDCDN(0)); - /* ep0_urb->actual_length++; */ - } - - ep0_urb->actual_length += n; - - udc_dump_buffer("urb read", (u8 *) data32, ep0_urb->actual_length); - - writel(UDCCSR0_OPC | UDCCSR0_IPR, UDCCSR0); - if (ep0_urb->actual_length == ep0_urb->device_request.wLength) - return 1; - - return 0; -} - -static void udc_handle_ep0(struct usb_endpoint_instance *endpoint) -{ - u32 udccsr0 = readl(UDCCSR0); - u32 *data = (u32 *) &ep0_urb->device_request; - int i; - - usbdbg("udccsr0 %x", udccsr0); - - /* Clear stall status */ - if (udccsr0 & UDCCSR0_SST) { - usberr("clear stall status"); - writel(UDCCSR0_SST, UDCCSR0); - ep0state = EP0_IDLE; - } - - /* previous request unfinished? non-error iff back-to-back ... */ - if ((udccsr0 & UDCCSR0_SA) != 0 && ep0state != EP0_IDLE) - ep0state = EP0_IDLE; - - switch (ep0state) { - - case EP0_IDLE: - udccsr0 = readl(UDCCSR0); - /* Start control request? */ - if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) - == (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) { - - /* Read SETUP packet. - * SETUP packet size is 8 bytes (aka 2 words) - */ - usbdbg("try reading SETUP packet"); - for (i = 0; i < 2; i++) { - if ((readl(UDCCSR0) & UDCCSR0_RNE) == 0) { - usberr("setup packet too short:%d", i); - goto stall; - } - data[i] = readl(UDCDR0); - } - - writel(readl(UDCCSR0) | UDCCSR0_OPC | UDCCSR0_SA, UDCCSR0); - if ((readl(UDCCSR0) & UDCCSR0_RNE) != 0) { - usberr("setup packet too long"); - goto stall; - } - - udc_dump_buffer("ep0 setup read", (u8 *) data, 8); - - if (ep0_urb->device_request.wLength == 0) { - usbdbg("Zero Data control Packet\n"); - if (ep0_recv_setup(ep0_urb)) { - usberr("Invalid Setup Packet\n"); - udc_dump_buffer("ep0 setup read", - (u8 *)data, 8); - goto stall; - } - writel(UDCCSR0_IPR, UDCCSR0); - ep0state = EP0_IDLE; - } else { - /* Check direction */ - if ((ep0_urb->device_request.bmRequestType & - USB_REQ_DIRECTION_MASK) - == USB_REQ_HOST2DEVICE) { - ep0state = EP0_OUT_DATA; - ep0_urb->buffer = - (u8 *)ep0_urb->buffer_data; - ep0_urb->buffer_length = - sizeof(ep0_urb->buffer_data); - ep0_urb->actual_length = 0; - writel(UDCCSR0_IPR, UDCCSR0); - } else { - /* The ep0_recv_setup function has - * already placed our response packet - * data in ep0_urb->buffer and the - * packet length in - * ep0_urb->actual_length. - */ - if (ep0_recv_setup(ep0_urb)) { -stall: - usberr("Invalid setup packet"); - udc_dump_buffer("ep0 setup read" - , (u8 *) data, 8); - ep0state = EP0_IDLE; - - writel(UDCCSR0_SA | - UDCCSR0_OPC | UDCCSR0_FST | - UDCCS0_FTF, UDCCSR0); - - return; - } - - endpoint->tx_urb = ep0_urb; - endpoint->sent = 0; - usbdbg("EP0_IN_DATA"); - ep0state = EP0_IN_DATA; - if (udc_write_urb(endpoint) < 0) - goto stall; - - } - } - return; - } else if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA)) - == (UDCCSR0_OPC|UDCCSR0_SA)) { - usberr("Setup Active but no data. Stalling ....\n"); - goto stall; - } else { - usbdbg("random early IRQs"); - /* Some random early IRQs: - * - we acked FST - * - IPR cleared - * - OPC got set, without SA (likely status stage) - */ - writel(udccsr0 & (UDCCSR0_SA | UDCCSR0_OPC), UDCCSR0); - } - break; - - case EP0_OUT_DATA: - - if ((udccsr0 & UDCCSR0_OPC) && !(udccsr0 & UDCCSR0_SA)) { - if (udc_read_urb_ep0()) { -read_complete: - ep0state = EP0_IDLE; - if (ep0_recv_setup(ep0_urb)) { - /* Not a setup packet, stall next - * EP0 transaction - */ - udc_dump_buffer("ep0 setup read", - (u8 *) data, 8); - usberr("can't parse setup packet\n"); - goto stall; - } - } - } else if (!(udccsr0 & UDCCSR0_OPC) && - !(udccsr0 & UDCCSR0_IPR)) { - if (ep0_urb->device_request.wLength == - ep0_urb->actual_length) - goto read_complete; - - usberr("Premature Status\n"); - ep0state = EP0_IDLE; - } - break; - - case EP0_IN_DATA: - /* GET_DESCRIPTOR etc */ - if (udccsr0 & UDCCSR0_OPC) { - writel(UDCCSR0_OPC | UDCCSR0_FTF, UDCCSR0); - usberr("ep0in premature status"); - ep0state = EP0_IDLE; - } else { - /* irq was IPR clearing */ - if (udc_write_urb(endpoint) < 0) { - usberr("ep0_write_error\n"); - goto stall; - } - } - break; - - case EP0_XFER_COMPLETE: - writel(UDCCSR0_IPR, UDCCSR0); - ep0state = EP0_IDLE; - break; - - default: - usbdbg("Default\n"); - } - writel(USIR0_IR0, USIR0); -} - -static void udc_handle_ep(struct usb_endpoint_instance *endpoint) -{ - int ep_addr = endpoint->endpoint_address; - int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; - int ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; - - u32 flags = readl(UDCCSN(ep_num)) & (UDCCSR_SST | UDCCSR_TRN); - if (flags) - writel(flags, UDCCSN(ep_num)); - - if (ep_isout) - udc_read_urb(endpoint); - else - udc_write_urb(endpoint); - - writel(UDCCSR_PC, UDCCSN(ep_num)); -} - -static void udc_state_changed(void) -{ - - writel(readl(UDCCR) | UDCCR_SMAC, UDCCR); - - usbdbg("New UDC settings are: conf %d - inter %d - alter %d", - (readl(UDCCR) & UDCCR_ACN) >> UDCCR_ACN_S, - (readl(UDCCR) & UDCCR_AIN) >> UDCCR_AIN_S, - (readl(UDCCR) & UDCCR_AAISN) >> UDCCR_AAISN_S); - - usbd_device_event_irq(udc_device, DEVICE_CONFIGURED, 0); - writel(UDCISR1_IRCC, UDCISR1); -} - -void udc_irq(void) -{ - int handled; - struct usb_endpoint_instance *endpoint; - int ep_num, i; - u32 udcisr0; - - do { - handled = 0; - /* Suspend Interrupt Request */ - if (readl(USIR1) & UDCCR_SUSIR) { - usbdbg("Suspend\n"); - udc_ack_int_UDCCR(UDCCR_SUSIR); - handled = 1; - ep0state = EP0_IDLE; - } - - /* Resume Interrupt Request */ - if (readl(USIR1) & UDCCR_RESIR) { - udc_ack_int_UDCCR(UDCCR_RESIR); - handled = 1; - usbdbg("USB resume\n"); - } - - if (readl(USIR1) & (1<<31)) { - handled = 1; - udc_state_changed(); - } - - /* Reset Interrupt Request */ - if (readl(USIR1) & UDCCR_RSTIR) { - udc_ack_int_UDCCR(UDCCR_RSTIR); - handled = 1; - usbdbg("Reset\n"); - usbd_device_event_irq(udc_device, DEVICE_RESET, 0); - } else { - if (readl(USIR0)) - usbdbg("UISR0: %x \n", readl(USIR0)); - - if (readl(USIR0) & 0x2) - writel(0x2, USIR0); - - /* Control traffic */ - if (readl(USIR0) & USIR0_IR0) { - handled = 1; - writel(USIR0_IR0, USIR0); - udc_handle_ep0(udc_device->bus->endpoint_array); - } - - endpoint = udc_device->bus->endpoint_array; - for (i = 0; i < udc_device->bus->max_endpoints; i++) { - ep_num = (endpoint[i].endpoint_address) & - USB_ENDPOINT_NUMBER_MASK; - if (!ep_num) - continue; - udcisr0 = readl(UDCISR0); - if (udcisr0 & - UDCISR_INT(ep_num, UDC_INT_PACKETCMP)) { - writel(UDCISR_INT(ep_num, UDC_INT_PACKETCMP), - UDCISR0); - udc_handle_ep(&endpoint[i]); - } - } - } - - } while (handled); -} - -/* The UDCCR reg contains mask and interrupt status bits, - * so using '|=' isn't safe as it may ack an interrupt. - */ -#define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ -#define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_UDE) - -static inline void udc_set_mask_UDCCR(int mask) -{ - writel((readl(UDCCR) & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS), UDCCR); -} - -static inline void udc_clear_mask_UDCCR(int mask) -{ - writel((readl(UDCCR) & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS), UDCCR); -} - -static void pio_irq_enable(int ep_num) -{ - if (ep_num < 16) - writel(readl(UDCICR0) | 3 << (ep_num * 2), UDCICR0); - else { - ep_num -= 16; - writel(readl(UDCICR1) | 3 << (ep_num * 2), UDCICR1); - } -} - -/* - * udc_set_nak - * - * Allow upper layers to signal lower layers should not accept more RX data - */ -void udc_set_nak(int ep_num) -{ - /* TODO */ -} - -/* - * udc_unset_nak - * - * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint. - * Switch off NAKing on this endpoint to accept more data output from host. - */ -void udc_unset_nak(int ep_num) -{ - /* TODO */ -} - -int udc_endpoint_write(struct usb_endpoint_instance *endpoint) -{ - return udc_write_urb(endpoint); -} - -/* Associate a physical endpoint with endpoint instance */ -void udc_setup_ep(struct usb_device_instance *device, unsigned int id, - struct usb_endpoint_instance *endpoint) -{ - int ep_num, ep_addr, ep_isout, ep_type, ep_size; - int config, interface, alternate; - u32 tmp; - - usbdbg("setting up endpoint id %d", id); - - if (!endpoint) { - usberr("endpoint void!"); - return; - } - - ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; - if (ep_num >= UDC_MAX_ENDPOINTS) { - usberr("unable to setup ep %d!", ep_num); - return; - } - - pio_irq_enable(ep_num); - if (ep_num == 0) { - /* Done for ep0 */ - return; - } - - config = 1; - interface = 0; - alternate = 0; - - usbdbg("config %d - interface %d - alternate %d", - config, interface, alternate); - - ep_addr = endpoint->endpoint_address; - ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; - ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; - ep_type = ep_isout ? endpoint->rcv_attributes : endpoint->tx_attributes; - ep_size = ep_isout ? endpoint->rcv_packetSize : endpoint->tx_packetSize; - - usbdbg("addr %x, num %d, dir %s, type %s, packet size %d", - ep_addr, ep_num, - ep_isout ? "out" : "in", - ep_type == USB_ENDPOINT_XFER_ISOC ? "isoc" : - ep_type == USB_ENDPOINT_XFER_BULK ? "bulk" : - ep_type == USB_ENDPOINT_XFER_INT ? "int" : "???", - ep_size - ); - - /* Configure UDCCRx */ - tmp = 0; - tmp |= (config << UDCCONR_CN_S) & UDCCONR_CN; - tmp |= (interface << UDCCONR_IN_S) & UDCCONR_IN; - tmp |= (alternate << UDCCONR_AISN_S) & UDCCONR_AISN; - tmp |= (ep_num << UDCCONR_EN_S) & UDCCONR_EN; - tmp |= (ep_type << UDCCONR_ET_S) & UDCCONR_ET; - tmp |= ep_isout ? 0 : UDCCONR_ED; - tmp |= (ep_size << UDCCONR_MPS_S) & UDCCONR_MPS; - tmp |= UDCCONR_EE; - - writel(tmp, UDCCN(ep_num)); - - usbdbg("UDCCR%c = %x", 'A' + ep_num-1, readl(UDCCN(ep_num))); - usbdbg("UDCCSR%c = %x", 'A' + ep_num-1, readl(UDCCSN(ep_num))); -} - -/* Connect the USB device to the bus */ -void udc_connect(void) -{ - usbdbg("UDC connect"); - -#ifdef CONFIG_USB_DEV_PULLUP_GPIO - /* Turn on the USB connection by enabling the pullup resistor */ - writel(readl(GPDR(CONFIG_USB_DEV_PULLUP_GPIO)) - | GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), - GPDR(CONFIG_USB_DEV_PULLUP_GPIO)); - writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPSR(CONFIG_USB_DEV_PULLUP_GPIO)); -#else - /* Host port 2 transceiver D+ pull up enable */ - writel(readl(UP2OCR) | UP2OCR_DPPUE, UP2OCR); -#endif -} - -/* Disconnect the USB device to the bus */ -void udc_disconnect(void) -{ - usbdbg("UDC disconnect"); - -#ifdef CONFIG_USB_DEV_PULLUP_GPIO - /* Turn off the USB connection by disabling the pullup resistor */ - writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPCR(CONFIG_USB_DEV_PULLUP_GPIO)); -#else - /* Host port 2 transceiver D+ pull up disable */ - writel(readl(UP2OCR) & ~UP2OCR_DPPUE, UP2OCR); -#endif -} - -/* Switch on the UDC */ -void udc_enable(struct usb_device_instance *device) -{ - - ep0state = EP0_IDLE; - - /* enable endpoint 0, A, B's Packet Complete Interrupt. */ - writel(0xffffffff, UDCICR0); - writel(0xa8000000, UDCICR1); - - /* clear the interrupt status/control registers */ - writel(0xffffffff, UDCISR0); - writel(0xffffffff, UDCISR1); - - /* set UDC-enable */ - udc_set_mask_UDCCR(UDCCR_UDE); - - udc_device = device; - if (!ep0_urb) - ep0_urb = usbd_alloc_urb(udc_device, - udc_device->bus->endpoint_array); - else - usbinfo("ep0_urb %p already allocated", ep0_urb); - - usbdbg("UDC Enabled\n"); -} - -/* Need to check this again */ -void udc_disable(void) -{ - usbdbg("disable UDC"); - - udc_clear_mask_UDCCR(UDCCR_UDE); - - /* Disable clock for USB device */ - writel(readl(CKEN) & ~CKEN11_USB, CKEN); - - /* Free ep0 URB */ - if (ep0_urb) { - usbd_dealloc_urb(ep0_urb); - ep0_urb = NULL; - } - - /* Reset device pointer */ - udc_device = NULL; -} - -/* Allow udc code to do any additional startup */ -void udc_startup_events(struct usb_device_instance *device) -{ - /* The DEVICE_INIT event puts the USB device in the state STATE_INIT */ - usbd_device_event_irq(device, DEVICE_INIT, 0); - - /* The DEVICE_CREATE event puts the USB device in the state - * STATE_ATTACHED */ - usbd_device_event_irq(device, DEVICE_CREATE, 0); - - /* Some USB controller driver implementations signal - * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here. - * DEVICE_HUB_CONFIGURED causes a transition to the state - * STATE_POWERED, and DEVICE_RESET causes a transition to - * the state STATE_DEFAULT. - */ - udc_enable(device); -} - -/* Initialize h/w stuff */ -int udc_init(void) -{ - udc_device = NULL; - usbdbg("PXA27x usbd start"); - - /* Enable clock for USB device */ - writel(readl(CKEN) | CKEN11_USB, CKEN); - - /* Disable the UDC */ - udc_clear_mask_UDCCR(UDCCR_UDE); - - /* Disable IRQs: we don't use them */ - writel(0, UDCICR0); - writel(0, UDCICR1); - - return 0; -} diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 7d5bde53870..31ae9f74e7a 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -32,6 +32,14 @@ config USB_XHCI_DWC3_OF_SIMPLE Support USB2/3 functionality in simple SoC integrations with USB controller based on the DesignWare USB3 IP Core. +config USB_XHCI_EXYNOS + bool "Support for Samsung Exynos5 family on-chip xHCI USB controller" + depends on ARCH_EXYNOS5 + default y + help + Enables support for he on-chip xHCI controller on Samsung Exynos5 + SoCs. + config USB_XHCI_MTK bool "Support for MediaTek on-chip xHCI USB controller" depends on ARCH_MEDIATEK @@ -157,6 +165,14 @@ config USB_EHCI_ATMEL ---help--- Enables support for the on-chip EHCI controller on Atmel chips. +config USB_EHCI_EXYNOS + bool "Support for Samsung Exynos EHCI USB controller" + depends on ARCH_EXYNOS + default y + ---help--- + Enables support for the on-chip EHCI controller on Samsung Exynos + SoCs. + config USB_EHCI_MARVELL bool "Support for Marvell on-chip EHCI USB controller" depends on ARCH_MVEBU || ARCH_KIRKWOOD || ARCH_ORION5X @@ -281,10 +297,17 @@ config USB_EHCI_TXFIFO_THRESH endif # USB_EHCI_HCD +config USB_OHCI_NEW + bool + +config SYS_USB_OHCI_CPU_INIT + bool + config USB_OHCI_HCD bool "OHCI HCD (USB 1.1) support" depends on DM && OF_CONTROL select USB_HOST + select USB_OHCI_NEW ---help--- The Open Host Controller Interface (OHCI) is a standard for accessing USB 1.1 host controller hardware. It does more in hardware than Intel's @@ -316,6 +339,19 @@ config USB_OHCI_DA8XX endif # USB_OHCI_HCD +config SYS_USB_OHCI_SLOT_NAME + string "Display name for the OHCI controller" + depends on USB_OHCI_NEW && !DM_USB + +config SYS_USB_OHCI_MAX_ROOT_PORTS + int "Maximal number of ports of the root hub" + depends on USB_OHCI_NEW + default 1 if ARCH_SUNXI + +config SYS_OHCI_SWAP_REG_ACCESS + bool "Perform byte swapping on OHCI controller register accesses" + depends on USB_OHCI_NEW + config USB_UHCI_HCD bool "UHCI HCD (most Intel and VIA) support" select USB_HOST @@ -365,6 +401,30 @@ config USB_R8A66597_HCD This enables support for the on-chip Renesas R8A66597 USB 2.0 controller, present in various RZ and SH SoCs. +config USB_ATMEL + bool "AT91 OHCI USB support" + depends on ARCH_AT91 + select SYS_USB_OHCI_CPU_INIT + select USB_OHCI_NEW + +choice + prompt "Clock for OHCI" + depends on USB_ATMEL + +config USB_ATMEL_CLK_SEL_PLLB + bool "PLLB" + +config USB_ATMEL_CLK_SEL_UPLL + bool "UPLL" + +endchoice + +config USB_OHCI_LPC32XX + bool "LPC32xx USB OHCI support" + depends on ARCH_LPC32XX + select SYS_USB_OHCI_CPU_INIT + select USB_OHCI_NEW + config USB_MAX_CONTROLLER_COUNT int "Maximum number of USB host controllers" depends on USB_EHCI_FSL || USB_XHCI_FSL || \ diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 8ceabaf45c1..9b955c1bd67 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -5,9 +5,6 @@ */ #include <common.h> - -#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) - #include <asm/arch/clk.h> int usb_cpu_init(void) @@ -65,5 +62,3 @@ int usb_cpu_init_fail(void) { return usb_cpu_stop(); } - -#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */ diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c index 163f0ef17b1..5d23058aaf6 100644 --- a/drivers/usb/host/ohci-generic.c +++ b/drivers/usb/host/ohci-generic.c @@ -14,10 +14,6 @@ #include <reset.h> #include "ohci.h" -#if !defined(CONFIG_USB_OHCI_NEW) -# error "Generic OHCI driver requires CONFIG_USB_OHCI_NEW" -#endif - struct generic_ohci { ohci_t ohci; struct clk *clocks; /* clock list */ diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index fedf0db9c7e..9acef5ee4f8 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -35,13 +35,6 @@ #include <asm/cache.h> #include <linux/delay.h> -#if defined(CONFIG_PCI_OHCI) -# include <pci.h> -#if !defined(CONFIG_PCI_OHCI_DEVNO) -#define CONFIG_PCI_OHCI_DEVNO 0 -#endif -#endif - #include <malloc.h> #include <memalign.h> #include <usb.h> @@ -53,7 +46,6 @@ #endif #if defined(CONFIG_CPU_ARM920T) || \ - defined(CONFIG_PCI_OHCI) || \ defined(CONFIG_PCI) || \ defined(CONFIG_SYS_OHCI_USE_NPS) # define OHCI_USE_NPS /* force NoPowerSwitching mode */ @@ -68,26 +60,6 @@ #define OHCI_CONTROL_INIT \ (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE -#if !CONFIG_IS_ENABLED(DM_USB) -#ifdef CONFIG_PCI_OHCI -static struct pci_device_id ohci_pci_ids[] = { - {0x10b9, 0x5237}, /* ULI1575 PCI OHCI module ids */ - {0x1033, 0x0035}, /* NEC PCI OHCI module ids */ - {0x1131, 0x1561}, /* Philips 1561 PCI OHCI module ids */ - /* Please add supported PCI OHCI controller ids here */ - {0, 0} -}; -#endif -#endif - -#ifdef CONFIG_PCI_EHCI_DEVNO -static struct pci_device_id ehci_pci_ids[] = { - {0x1131, 0x1562}, /* Philips 1562 PCI EHCI module ids */ - /* Please add supported PCI EHCI controller ids here */ - {0, 0} -}; -#endif - #ifdef DEBUG #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg) #else @@ -2007,21 +1979,6 @@ static char ohci_inited = 0; int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) { -#ifdef CONFIG_PCI_OHCI - pci_dev_t pdev; -#endif - -#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT - /* cpu dependant init */ - if (usb_cpu_init()) - return -1; -#endif - -#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT - /* board dependant init */ - if (board_usb_init(index, USB_INIT_HOST)) - return -1; -#endif memset(&gohci, 0, sizeof(ohci_t)); /* align the storage */ @@ -2036,28 +1993,7 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) gohci.disabled = 1; gohci.sleeping = 0; gohci.irq = -1; -#ifdef CONFIG_PCI_OHCI - pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO); - - if (pdev != -1) { - u16 vid, did; - u32 base; - pci_read_config_word(pdev, PCI_VENDOR_ID, &vid); - pci_read_config_word(pdev, PCI_DEVICE_ID, &did); - printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n", - vid, did, (pdev >> 16) & 0xff, - (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7); - pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base); - printf("OHCI regs address 0x%08x\n", base); - gohci.regs = (struct ohci_regs *)base; - } else { - printf("%s: OHCI devnr: %d not found\n", __func__, - CONFIG_PCI_OHCI_DEVNO); - return -1; - } -#else gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE; -#endif gohci.flags = 0; gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME; @@ -2065,15 +2001,6 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) if (hc_reset (&gohci) < 0) { hc_release_ohci (&gohci); err ("can't reset usb-%s", gohci.slot_name); -#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT - /* board dependant cleanup */ - board_usb_cleanup(index, USB_INIT_HOST); -#endif - -#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT - /* cpu dependant cleanup */ - usb_cpu_init_fail(); -#endif return -1; } @@ -2081,15 +2008,6 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) err("can't start usb-%s", gohci.slot_name); hc_release_ohci(&gohci); /* Initialization failed */ -#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT - /* board dependant cleanup */ - usb_board_stop(); -#endif - -#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT - /* cpu dependant cleanup */ - usb_cpu_stop(); -#endif return -1; } @@ -2112,17 +2030,6 @@ int usb_lowlevel_stop(int index) /* call hc_release_ohci() here ? */ hc_reset(&gohci); -#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT - /* board dependant cleanup */ - if (usb_board_stop()) - return -1; -#endif - -#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT - /* cpu dependant cleanup */ - if (usb_cpu_stop()) - return -1; -#endif /* This driver is no longer initialised. It needs a new low-level * init (board/cpu) before it can be used again. */ ohci_inited = 0; diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h index a38cd25eb85..7699f2e6b15 100644 --- a/drivers/usb/host/ohci.h +++ b/drivers/usb/host/ohci.h @@ -151,7 +151,7 @@ struct ohci_hcca { * Maximum number of root hub ports. */ #ifndef CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS -# error "CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS undefined!" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #endif /* diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 63d8dbe3c85..7019b263963 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -36,7 +36,6 @@ obj-$(CONFIG_LG4573) += lg4573.o obj-$(CONFIG_LOGICORE_DP_TX) += logicore_dp_tx.o obj-$(CONFIG_NXP_TDA19988) += tda19988.o obj-$(CONFIG_OSD) += video_osd-uclass.o -obj-$(CONFIG_PXA_LCD) += pxa_lcd.o obj-$(CONFIG_SANDBOX_OSD) += sandbox_osd.o obj-$(CONFIG_SCF0403_LCD) += scf0403_lcd.o obj-$(CONFIG_VIDEO_ARM_MALIDP) += mali_dp.o diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c deleted file mode 100644 index 21ade8d93c4..00000000000 --- a/drivers/video/pxa_lcd.c +++ /dev/null @@ -1,549 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * PXA LCD Controller - * - * (C) Copyright 2001-2002 - * Wolfgang Denk, DENX Software Engineering -- wd@denx.de - */ - -/************************************************************************/ -/* ** HEADER FILES */ -/************************************************************************/ - -#include <common.h> -#include <log.h> -#include <asm/arch/pxa-regs.h> -#include <asm/io.h> -#include <lcd.h> -#include <linux/types.h> -#include <stdarg.h> -#include <stdio_dev.h> - -/* #define DEBUG */ - -#ifdef CONFIG_LCD - -/*----------------------------------------------------------------------*/ -/* - * Define panel bpp, LCCR0, LCCR3 and panel_info video struct for - * your display. - */ - -#ifdef CONFIG_PXA_VGA -/* LCD outputs connected to a video DAC */ -# define LCD_BPP LCD_COLOR8 - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x003008f8 -# define REG_LCCR3 0x0300FF01 - -/* 640x480x16 @ 61 Hz */ -vidinfo_t panel_info = { - .vl_col = 640, - .vl_row = 480, - .vl_width = 640, - .vl_height = 480, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 0, - .vl_clor = 0, - .vl_tft = 1, - .vl_hpw = 40, - .vl_blw = 56, - .vl_elw = 56, - .vl_vpw = 20, - .vl_bfw = 8, - .vl_efw = 8, -}; -#endif /* CONFIG_PXA_VIDEO */ - -/*----------------------------------------------------------------------*/ -#ifdef CONFIG_SHARP_LM8V31 - -# define LCD_BPP LCD_COLOR8 -# define LCD_INVERT_COLORS /* Needed for colors to be correct, but why? */ - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x0030087C -# define REG_LCCR3 0x0340FF08 - -vidinfo_t panel_info = { - .vl_col = 640, - .vl_row = 480, - .vl_width = 157, - .vl_height = 118, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 1, - .vl_clor = 1, - .vl_tft = 0, - .vl_hpw = 1, - .vl_blw = 3, - .vl_elw = 3, - .vl_vpw = 1, - .vl_bfw = 0, - .vl_efw = 0, -}; -#endif /* CONFIG_SHARP_LM8V31 */ -/*----------------------------------------------------------------------*/ -#ifdef CONFIG_VOIPAC_LCD - -# define LCD_BPP LCD_COLOR8 -# define LCD_INVERT_COLORS - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x043008f8 -# define REG_LCCR3 0x0340FF08 - -vidinfo_t panel_info = { - .vl_col = 640, - .vl_row = 480, - .vl_width = 157, - .vl_height = 118, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 1, - .vl_clor = 1, - .vl_tft = 1, - .vl_hpw = 32, - .vl_blw = 144, - .vl_elw = 32, - .vl_vpw = 2, - .vl_bfw = 13, - .vl_efw = 30, -}; -#endif /* CONFIG_VOIPAC_LCD */ - -/*----------------------------------------------------------------------*/ -#ifdef CONFIG_HITACHI_SX14 -/* Hitachi SX14Q004-ZZA color STN LCD */ -#define LCD_BPP LCD_COLOR8 - -/* you have to set lccr0 and lccr3 (including pcd) */ -#define REG_LCCR0 0x00301079 -#define REG_LCCR3 0x0340FF20 - -vidinfo_t panel_info = { - .vl_col = 320, - .vl_row = 240, - .vl_width = 167, - .vl_height = 109, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 1, - .vl_splt = 0, - .vl_clor = 1, - .vl_tft = 0, - .vl_hpw = 1, - .vl_blw = 1, - .vl_elw = 1, - .vl_vpw = 7, - .vl_bfw = 0, - .vl_efw = 0, -}; -#endif /* CONFIG_HITACHI_SX14 */ - -/*----------------------------------------------------------------------*/ -#ifdef CONFIG_LMS283GF05 - -# define LCD_BPP LCD_COLOR8 -/*# define LCD_INVERT_COLORS*/ - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x043008f8 -# define REG_LCCR3 0x03b00009 - -vidinfo_t panel_info = { - .vl_col = 240, - .vl_row = 320, - .vl_rot = 3, - .vl_width = 240, - .vl_height = 320, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_LOW, - .vl_hsp = CONFIG_SYS_LOW, - .vl_vsp = CONFIG_SYS_LOW, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 1, - .vl_clor = 1, - .vl_tft = 1, - .vl_hpw = 4, - .vl_blw = 4, - .vl_elw = 8, - .vl_vpw = 4, - .vl_bfw = 4, - .vl_efw = 8, -}; -#endif /* CONFIG_LMS283GF05 */ - -/*----------------------------------------------------------------------*/ - -#ifdef CONFIG_LQ038J7DH53 - -# define LCD_BPP LCD_COLOR8 - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x003008f9 -# define REG_LCCR3 0x03700004 - -vidinfo_t panel_info = { - .vl_col = 320, - .vl_row = 480, - .vl_width = 320, - .vl_height = 480, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_LOW, - .vl_hsp = CONFIG_SYS_LOW, - .vl_vsp = CONFIG_SYS_LOW, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 1, - .vl_clor = 1, - .vl_tft = 1, - .vl_hpw = 0x04, - .vl_blw = 0x20, - .vl_elw = 0x01, - .vl_vpw = 0x01, - .vl_bfw = 0x04, - .vl_efw = 0x01, -}; -#endif /* CONFIG_LQ038J7DH53 */ - -/*----------------------------------------------------------------------*/ - -#ifdef CONFIG_LITTLETON_LCD -# define LCD_BPP LCD_COLOR8 - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x003008f8 -# define REG_LCCR3 0x0300FF04 - -vidinfo_t panel_info = { - .vl_col = 480, - .vl_row = 640, - .vl_width = 480, - .vl_height = 640, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 0, - .vl_clor = 0, - .vl_tft = 1, - .vl_hpw = 9, - .vl_blw = 8, - .vl_elw = 24, - .vl_vpw = 2, - .vl_bfw = 2, - .vl_efw = 4, -}; -#endif /* CONFIG_LITTLETON_LCD */ - -/*----------------------------------------------------------------------*/ - -static int pxafb_init_mem (void *lcdbase, vidinfo_t *vid); -static void pxafb_setup_gpio (vidinfo_t *vid); -static void pxafb_enable_controller (vidinfo_t *vid); -static int pxafb_init (vidinfo_t *vid); - -/************************************************************************/ -/* --------------- PXA chipset specific functions ------------------- */ -/************************************************************************/ - -ushort *configuration_get_cmap(void) -{ - struct pxafb_info *fbi = &panel_info.pxa; - return (ushort *)fbi->palette; -} - -void lcd_ctrl_init (void *lcdbase) -{ - pxafb_init_mem(lcdbase, &panel_info); - pxafb_init(&panel_info); - pxafb_setup_gpio(&panel_info); - pxafb_enable_controller(&panel_info); -} - -/*----------------------------------------------------------------------*/ -#if LCD_BPP == LCD_COLOR8 -void -lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue) -{ - struct pxafb_info *fbi = &panel_info.pxa; - unsigned short *palette = (unsigned short *)fbi->palette; - u_int val; - - if (regno < fbi->palette_size) { - val = ((red << 8) & 0xf800); - val |= ((green << 4) & 0x07e0); - val |= (blue & 0x001f); - -#ifdef LCD_INVERT_COLORS - palette[regno] = ~val; -#else - palette[regno] = val; -#endif - } - - debug ("setcolreg: reg %2d @ %p: R=%02X G=%02X B=%02X => %04X\n", - regno, &palette[regno], - red, green, blue, - palette[regno]); -} -#endif /* LCD_COLOR8 */ - -/*----------------------------------------------------------------------*/ -__weak void lcd_enable(void) -{ -} - -/************************************************************************/ -/* ** PXA255 specific routines */ -/************************************************************************/ - -/* - * Calculate fb size for VIDEOLFB_ATAG. Size returned contains fb, - * descriptors and palette areas. - */ -ulong calc_fbsize (void) -{ - ulong size; - int line_length = (panel_info.vl_col * NBITS (panel_info.vl_bpix)) / 8; - - size = line_length * panel_info.vl_row; - size += PAGE_SIZE; - - return size; -} - -static int pxafb_init_mem (void *lcdbase, vidinfo_t *vid) -{ - u_long palette_mem_size; - struct pxafb_info *fbi = &vid->pxa; - int fb_size = vid->vl_row * (vid->vl_col * NBITS (vid->vl_bpix)) / 8; - - fbi->screen = (u_long)lcdbase; - - fbi->palette_size = NBITS(vid->vl_bpix) == 8 ? 256 : 16; - palette_mem_size = fbi->palette_size * sizeof(u16); - - debug("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size); - /* locate palette and descs at end of page following fb */ - fbi->palette = (u_long)lcdbase + fb_size + PAGE_SIZE - palette_mem_size; - - return 0; -} -#ifdef CONFIG_CPU_MONAHANS -static inline void pxafb_setup_gpio (vidinfo_t *vid) {} -#else -static void pxafb_setup_gpio (vidinfo_t *vid) -{ - u_long lccr0; - - /* - * setup is based on type of panel supported - */ - - lccr0 = vid->pxa.reg_lccr0; - - /* 4 bit interface */ - if ((lccr0 & LCCR0_CMS) && (lccr0 & LCCR0_SDS) && !(lccr0 & LCCR0_DPD)) - { - debug("Setting GPIO for 4 bit data\n"); - /* bits 58-61 */ - writel(readl(GPDR1) | (0xf << 26), GPDR1); - writel((readl(GAFR1_U) & ~(0xff << 20)) | (0xaa << 20), - GAFR1_U); - - /* bits 74-77 */ - writel(readl(GPDR2) | (0xf << 10), GPDR2); - writel((readl(GAFR2_L) & ~(0xff << 20)) | (0xaa << 20), - GAFR2_L); - } - - /* 8 bit interface */ - else if (((lccr0 & LCCR0_CMS) && ((lccr0 & LCCR0_SDS) || (lccr0 & LCCR0_DPD))) || - (!(lccr0 & LCCR0_CMS) && !(lccr0 & LCCR0_PAS) && !(lccr0 & LCCR0_SDS))) - { - debug("Setting GPIO for 8 bit data\n"); - /* bits 58-65 */ - writel(readl(GPDR1) | (0x3f << 26), GPDR1); - writel(readl(GPDR2) | (0x3), GPDR2); - - writel((readl(GAFR1_U) & ~(0xfff << 20)) | (0xaaa << 20), - GAFR1_U); - writel((readl(GAFR2_L) & ~0xf) | (0xa), GAFR2_L); - - /* bits 74-77 */ - writel(readl(GPDR2) | (0xf << 10), GPDR2); - writel((readl(GAFR2_L) & ~(0xff << 20)) | (0xaa << 20), - GAFR2_L); - } - - /* 16 bit interface */ - else if (!(lccr0 & LCCR0_CMS) && ((lccr0 & LCCR0_SDS) || (lccr0 & LCCR0_PAS))) - { - debug("Setting GPIO for 16 bit data\n"); - /* bits 58-77 */ - writel(readl(GPDR1) | (0x3f << 26), GPDR1); - writel(readl(GPDR2) | 0x00003fff, GPDR2); - - writel((readl(GAFR1_U) & ~(0xfff << 20)) | (0xaaa << 20), - GAFR1_U); - writel((readl(GAFR2_L) & 0xf0000000) | 0x0aaaaaaa, GAFR2_L); - } - else - { - printf("pxafb_setup_gpio: unable to determine bits per pixel\n"); - } -} -#endif - -static void pxafb_enable_controller (vidinfo_t *vid) -{ - debug("Enabling LCD controller\n"); - - /* Sequence from 11.7.10 */ - writel(vid->pxa.reg_lccr3, LCCR3); - writel(vid->pxa.reg_lccr2, LCCR2); - writel(vid->pxa.reg_lccr1, LCCR1); - writel(vid->pxa.reg_lccr0 & ~LCCR0_ENB, LCCR0); - writel(vid->pxa.fdadr0, FDADR0); - writel(vid->pxa.fdadr1, FDADR1); - writel(readl(LCCR0) | LCCR0_ENB, LCCR0); - -#ifdef CONFIG_CPU_MONAHANS - writel(readl(CKENA) | CKENA_1_LCD, CKENA); -#else - writel(readl(CKEN) | CKEN16_LCD, CKEN); -#endif - - debug("FDADR0 = 0x%08x\n", readl(FDADR0)); - debug("FDADR1 = 0x%08x\n", readl(FDADR1)); - debug("LCCR0 = 0x%08x\n", readl(LCCR0)); - debug("LCCR1 = 0x%08x\n", readl(LCCR1)); - debug("LCCR2 = 0x%08x\n", readl(LCCR2)); - debug("LCCR3 = 0x%08x\n", readl(LCCR3)); -} - -static int pxafb_init (vidinfo_t *vid) -{ - struct pxafb_info *fbi = &vid->pxa; - - debug("Configuring PXA LCD\n"); - - fbi->reg_lccr0 = REG_LCCR0; - fbi->reg_lccr3 = REG_LCCR3; - - debug("vid: vl_col=%d hslen=%d lm=%d rm=%d\n", - vid->vl_col, vid->vl_hpw, - vid->vl_blw, vid->vl_elw); - debug("vid: vl_row=%d vslen=%d um=%d bm=%d\n", - vid->vl_row, vid->vl_vpw, - vid->vl_bfw, vid->vl_efw); - - fbi->reg_lccr1 = - LCCR1_DisWdth(vid->vl_col) + - LCCR1_HorSnchWdth(vid->vl_hpw) + - LCCR1_BegLnDel(vid->vl_blw) + - LCCR1_EndLnDel(vid->vl_elw); - - fbi->reg_lccr2 = - LCCR2_DisHght(vid->vl_row) + - LCCR2_VrtSnchWdth(vid->vl_vpw) + - LCCR2_BegFrmDel(vid->vl_bfw) + - LCCR2_EndFrmDel(vid->vl_efw); - - fbi->reg_lccr3 = REG_LCCR3 & ~(LCCR3_HSP | LCCR3_VSP); - fbi->reg_lccr3 |= (vid->vl_hsp ? LCCR3_HorSnchL : LCCR3_HorSnchH) - | (vid->vl_vsp ? LCCR3_VrtSnchL : LCCR3_VrtSnchH); - - - /* setup dma descriptors */ - fbi->dmadesc_fblow = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 3*16); - fbi->dmadesc_fbhigh = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 2*16); - fbi->dmadesc_palette = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 1*16); - - #define BYTES_PER_PANEL ((fbi->reg_lccr0 & LCCR0_SDS) ? \ - (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8 / 2) : \ - (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8)) - - /* populate descriptors */ - fbi->dmadesc_fblow->fdadr = (u_long)fbi->dmadesc_fblow; - fbi->dmadesc_fblow->fsadr = fbi->screen + BYTES_PER_PANEL; - fbi->dmadesc_fblow->fidr = 0; - fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL; - - fbi->fdadr1 = (u_long)fbi->dmadesc_fblow; /* only used in dual-panel mode */ - - fbi->dmadesc_fbhigh->fsadr = fbi->screen; - fbi->dmadesc_fbhigh->fidr = 0; - fbi->dmadesc_fbhigh->ldcmd = BYTES_PER_PANEL; - - fbi->dmadesc_palette->fsadr = fbi->palette; - fbi->dmadesc_palette->fidr = 0; - fbi->dmadesc_palette->ldcmd = (fbi->palette_size * 2) | LDCMD_PAL; - - if( NBITS(vid->vl_bpix) < 12) - { - /* assume any mode with <12 bpp is palette driven */ - fbi->dmadesc_palette->fdadr = (u_long)fbi->dmadesc_fbhigh; - fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_palette; - /* flips back and forth between pal and fbhigh */ - fbi->fdadr0 = (u_long)fbi->dmadesc_palette; - } - else - { - /* palette shouldn't be loaded in true-color mode */ - fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_fbhigh; - fbi->fdadr0 = (u_long)fbi->dmadesc_fbhigh; /* no pal just fbhigh */ - } - - debug("fbi->dmadesc_fblow = 0x%lx\n", (u_long)fbi->dmadesc_fblow); - debug("fbi->dmadesc_fbhigh = 0x%lx\n", (u_long)fbi->dmadesc_fbhigh); - debug("fbi->dmadesc_palette = 0x%lx\n", (u_long)fbi->dmadesc_palette); - - debug("fbi->dmadesc_fblow->fdadr = 0x%lx\n", fbi->dmadesc_fblow->fdadr); - debug("fbi->dmadesc_fbhigh->fdadr = 0x%lx\n", fbi->dmadesc_fbhigh->fdadr); - debug("fbi->dmadesc_palette->fdadr = 0x%lx\n", fbi->dmadesc_palette->fdadr); - - debug("fbi->dmadesc_fblow->fsadr = 0x%lx\n", fbi->dmadesc_fblow->fsadr); - debug("fbi->dmadesc_fbhigh->fsadr = 0x%lx\n", fbi->dmadesc_fbhigh->fsadr); - debug("fbi->dmadesc_palette->fsadr = 0x%lx\n", fbi->dmadesc_palette->fsadr); - - debug("fbi->dmadesc_fblow->ldcmd = 0x%lx\n", fbi->dmadesc_fblow->ldcmd); - debug("fbi->dmadesc_fbhigh->ldcmd = 0x%lx\n", fbi->dmadesc_fbhigh->ldcmd); - debug("fbi->dmadesc_palette->ldcmd = 0x%lx\n", fbi->dmadesc_palette->ldcmd); - - return 0; -} - -/************************************************************************/ -/************************************************************************/ - -#endif /* CONFIG_LCD */ |