diff options
| author | Florin Chiculita <florinlaurentiu.chiculita@nxp.com> | 2019-10-14 17:27:07 +0300 |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2019-12-09 09:47:42 -0600 |
| commit | bf58916373f0a94aaf0aca5ee67bb18d5928fa0e (patch) | |
| tree | 7482710b59e5a0a8b4bcb578d402c4f4fce79ab3 /drivers | |
| parent | 7c56408be61ec5597c944bb67c034e7bf01922d5 (diff) | |
net: phy: aquantia: wait for phy init sequence to finish
Aquantia quad-phys may take longer to initialize. This commit adds
a polling mechanism for a global alarm bit that tells if phy init
sequence is completed.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/phy/aquantia.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c index 465ec2d342..1061fdfc16 100644 --- a/drivers/net/phy/aquantia.c +++ b/drivers/net/phy/aquantia.c @@ -37,6 +37,9 @@ #define GLOBAL_FAULT 0xc850 #define GLOBAL_RSTATUS_1 0xc885 +#define GLOBAL_ALARM_1 0xcc00 +#define SYSTEM_READY_BIT 0x40 + #define GLOBAL_STANDARD_CONTROL 0x0 #define SOFT_RESET BIT(15) #define LOW_POWER BIT(11) @@ -258,6 +261,18 @@ int aquantia_config(struct phy_device *phydev) { u32 val, id, rstatus, fault; u32 reg_val1 = 0; + int num_retries = 5; + + /* + * check if the system is out of reset and init sequence completed. + * chip-wide reset for gen1 quad phys takes longer + */ + while (--num_retries) { + rstatus = phy_read(phydev, MDIO_MMD_VEND1, GLOBAL_ALARM_1); + if (rstatus & SYSTEM_READY_BIT) + break; + mdelay(10); + } id = phy_read(phydev, MDIO_MMD_VEND1, GLOBAL_FIRMWARE_ID); rstatus = phy_read(phydev, MDIO_MMD_VEND1, GLOBAL_RSTATUS_1); |