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authorHari Nagalla <hnagalla@ti.com>2023-05-26 10:32:53 -0500
committerPraneeth Bajjuri <praneeth@ti.com>2023-05-30 06:35:37 -0500
commit4f8de06f9d1edbe0deabb105e625a77171c1b475 (patch)
tree11ce5c687d76d458e2fad291f2dc856d72eeab77 /drivers
parenta0cd183dda41bf6f854adece535cf5ff7df9ef14 (diff)
remoteproc: k3-dsp: Extend support for C71x DSPs on J721S2 SoCs
The K3 J721S2 SoCs have two C71x DSP subsystems in MAIN voltage domain, and there are no C66x DSP subsystems on these SoCs. The C71x DSP subsystem is a slighly updated version of the C71x DSP subsystem on J721e. The C71x DSPs are 64 bit machine with fixed and floating point DSP operations. Extend support to the C71x DSPs with J721S2 compatible strings. Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/remoteproc/ti_k3_dsp_rproc.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/remoteproc/ti_k3_dsp_rproc.c b/drivers/remoteproc/ti_k3_dsp_rproc.c
index 1a2e9dd1f5..335ea8501d 100644
--- a/drivers/remoteproc/ti_k3_dsp_rproc.c
+++ b/drivers/remoteproc/ti_k3_dsp_rproc.c
@@ -327,7 +327,8 @@ static int k3_dsp_of_get_memories(struct udevice *dev)
for (i = 0; i < dsp->num_mems; i++) {
/* C71 cores only have a L1P Cache, there are no L1P SRAMs */
- if (device_is_compatible(dev, "ti,j721e-c71-dsp") &&
+ if (((device_is_compatible(dev, "ti,j721e-c71-dsp")) ||
+ (device_is_compatible(dev, "ti,j721s2-c71-dsp"))) &&
!strcmp(mem_names[i], "l1pram")) {
dsp->mem[i].bus_addr = FDT_ADDR_T_NONE;
dsp->mem[i].dev_addr = FDT_ADDR_T_NONE;
@@ -446,6 +447,7 @@ static const struct k3_dsp_boot_data c71_data = {
static const struct udevice_id k3_dsp_ids[] = {
{ .compatible = "ti,j721e-c66-dsp", .data = (ulong)&c66_data, },
{ .compatible = "ti,j721e-c71-dsp", .data = (ulong)&c71_data, },
+ { .compatible = "ti,j721s2-c71-dsp", .data = (ulong)&c71_data, },
{}
};