diff options
| author | Jim Liu <jim.t90615@gmail.com> | 2022-09-13 14:23:15 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-10-11 15:40:48 -0400 |
| commit | 45455e8ff5634e77aede803f9a772dba08b9674f (patch) | |
| tree | 0d644e8ee31d4431b37069e10b975b6b1a2ffe3a /drivers | |
| parent | 05b0f241f271415d9a26416a5bec316f29a2583f (diff) | |
pinctrl: nuvoton: fix set persist error
CA9C is cortex A9 watchdog reset control bit.
if device set persist mode, it shouldn't set this bit.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index f6e20415e2..31678f5537 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -1388,10 +1388,10 @@ static int npcm7xx_gpio_reset_persist(struct udevice *dev, unsigned int banknum, dev_dbg(dev, "set gpio persist, bank %d, enable %d\n", banknum, enable); if (enable) { - regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD0RCR, BIT(num) | CA9C_RESET, 0); - regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR, BIT(num) | CA9C_RESET, 0); - regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD2RCR, BIT(num) | CA9C_RESET, 0); - regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_CORSTC, BIT(num) | CA9C_RESET, 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD0RCR, BIT(num), 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR, BIT(num), 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD2RCR, BIT(num), 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_CORSTC, BIT(num), 0); } else { regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD0RCR, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); |