summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
authorWeijie Gao <weijie.gao@mediatek.com>2020-11-12 16:37:07 +0800
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2021-01-24 21:39:27 +0100
commite58e68d93e7d73e42eac850ff0dafc634bf0d397 (patch)
tree8233cef73db1a92ea653a0df8fb1b4cea886f6cb /drivers
parent2a505cd1c733880c139ff62ef0a89ec36fcde72c (diff)
mmc: mtk-sd: assign plat->cfg.f_max with a correct value
Currently this driver does not set the value of plat->cfg.f_max, which results in that MMC framework will always run at the lowest frequency. This patch sets plat->cfg.f_max to the maximum allowed frequency, which equals to the source clock frequency. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/mtk-sd.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c
index 5e2ece0499..3b9c12266a 100644
--- a/drivers/mmc/mtk-sd.c
+++ b/drivers/mmc/mtk-sd.c
@@ -1639,6 +1639,8 @@ static int msdc_drv_probe(struct udevice *dev)
else
cfg->f_min = host->src_clk_freq / (4 * 4095);
+ cfg->f_max = host->src_clk_freq;
+
cfg->b_max = 1024;
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;