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authorTom Rini <trini@konsulko.com>2020-10-22 08:25:41 -0400
committerTom Rini <trini@konsulko.com>2020-10-22 08:25:41 -0400
commitb90daf2743b38022bea8727ede867ad63e971db2 (patch)
tree5ab97dff480f2cf32aa2cc1724d654ec60e6a73e /drivers
parent281d94b9867c69a6bbe1e6490f695def68b9fd0a (diff)
parent53de79fecc53338b544b4d2c2d88daba9d82b007 (diff)
Merge tag 'u-boot-stm32-20201021' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Activate CMD_EXPORTENV/CMD_IMPORTENV/CMD_ELF for STM32MP15 defconfig - Fix stm32prog command: parsing of FlashLayout without partition - Update MAINTAINERS for ARM STM STM32MP - Manage eth1addr on dh board with KS8851 - Limit size of cacheable DDR in pre-reloc stage in stm32mp1 - Use mmc_of_parse() to read host capabilities in mmc:sdmmc2 driver
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpio/stm32_gpio.c2
-rw-r--r--drivers/mmc/mmc-uclass.c2
-rw-r--r--drivers/mmc/stm32_sdmmc2.c18
3 files changed, 5 insertions, 17 deletions
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index 473e364796..b885cfb57e 100644
--- a/drivers/gpio/stm32_gpio.c
+++ b/drivers/gpio/stm32_gpio.c
@@ -18,6 +18,8 @@
#include <linux/errno.h>
#include <linux/io.h>
+#define STM32_GPIOS_PER_BANK 16
+
#define MODE_BITS(gpio_pin) ((gpio_pin) * 2)
#define MODE_BITS_MASK 3
#define BSRR_BIT(gpio_pin, value) BIT((gpio_pin) + (value ? 0 : 16))
diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index ec59bcd856..285ac48061 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -228,7 +228,7 @@ int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg)
if (dev_read_bool(dev, "cap-sd-highspeed"))
cfg->host_caps |= MMC_CAP(SD_HS);
if (dev_read_bool(dev, "cap-mmc-highspeed"))
- cfg->host_caps |= MMC_CAP(MMC_HS);
+ cfg->host_caps |= MMC_CAP(MMC_HS) | MMC_CAP(MMC_HS_52);
if (dev_read_bool(dev, "sd-uhs-sdr12"))
cfg->host_caps |= MMC_CAP(UHS_SDR12);
if (dev_read_bool(dev, "sd-uhs-sdr25"))
diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
index 6d50356217..77871d5afc 100644
--- a/drivers/mmc/stm32_sdmmc2.c
+++ b/drivers/mmc/stm32_sdmmc2.c
@@ -676,27 +676,13 @@ static int stm32_sdmmc2_probe(struct udevice *dev)
GPIOD_IS_IN);
cfg->f_min = 400000;
- cfg->f_max = dev_read_u32_default(dev, "max-frequency", 52000000);
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
cfg->name = "STM32 SD/MMC";
cfg->host_caps = 0;
- if (cfg->f_max > 25000000)
- cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
-
- switch (dev_read_u32_default(dev, "bus-width", 1)) {
- case 8:
- cfg->host_caps |= MMC_MODE_8BIT;
- /* fall through */
- case 4:
- cfg->host_caps |= MMC_MODE_4BIT;
- break;
- case 1:
- break;
- default:
- pr_err("invalid \"bus-width\" property, force to 1\n");
- }
+ cfg->f_max = 52000000;
+ mmc_of_parse(dev, cfg);
upriv->mmc = &plat->mmc;