Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh

9 files changed, 423 insertions, 6 deletions

diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c
index c821bddc251..5abb171827e 100644
--- a/drivers/clk/renesas/clk-rcar-gen3.c
+++ b/drivers/clk/renesas/clk-rcar-gen3.c
@@ -490,6 +490,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] = {
 	DEF_MOD("sdif0",		 314,	R8A7796_CLK_SD0),
 	DEF_MOD("pcie1",		 318,	R8A7796_CLK_S3D1),
 	DEF_MOD("pcie0",		 319,	R8A7796_CLK_S3D1),
+	DEF_MOD("usb3-if0",		 328,	R8A7796_CLK_S3D1),
 	DEF_MOD("usb-dmac0",		 330,	R8A7796_CLK_S3D1),
 	DEF_MOD("usb-dmac1",		 331,	R8A7796_CLK_S3D1),
 	DEF_MOD("rwdt",			 402,	R8A7796_CLK_R),
@@ -1074,6 +1075,64 @@ static int gen3_clk_probe(struct udevice *dev)
 	return 0;
 }
 
+struct mstp_stop_table {
+	u32	dis;
+	u32	en;
+};
+
+static struct mstp_stop_table r8a7795_mstp_table[] = {
+	{ 0x00640800, 0x0 },	{ 0xF3EE9390, 0x0 },
+	{ 0x340FAFDC, 0x2040 },	{ 0xD80C7CDF, 0x400 },
+	{ 0x80000184, 0x180 },	{ 0x40BFFF46, 0x0 },
+	{ 0xE5FBEECF, 0x0 },	{ 0x39FFFF0E, 0x0 },
+	{ 0x01F19FF4, 0x0 },	{ 0xFFDFFFFF, 0x0 },
+	{ 0xFFFEFFE0, 0x0 },	{ 0x00000000, 0x0 },
+};
+
+static struct mstp_stop_table r8a7796_mstp_table[] = {
+	{ 0x00200000, 0x0 },	{ 0xFFFFFFFF, 0x0 },
+	{ 0x340E2FDC, 0x2040 },	{ 0xFFFFFFDF, 0x400 },
+	{ 0x80000184, 0x180 },	{ 0xC3FFFFFF, 0x0 },
+	{ 0xFFFFFFFF, 0x0 },	{ 0xFFFFFFFF, 0x0 },
+	{ 0x01F1FFF7, 0x0 },	{ 0xFFFFFFFE, 0x0 },
+	{ 0xFFFEFFE0, 0x0 },	{ 0x000000B7, 0x0 },
+};
+
+#define TSTR0		0x04
+#define TSTR0_STR0	BIT(0)
+
+static int gen3_clk_remove(struct udevice *dev)
+{
+	struct gen3_clk_priv *priv = dev_get_priv(dev);
+	enum gen3_clk_model model = dev_get_driver_data(dev);
+	struct mstp_stop_table *tbl;
+	unsigned int i, tbl_size;
+
+	switch (model) {
+	case CLK_R8A7795:
+		tbl = r8a7795_mstp_table;
+		tbl_size = ARRAY_SIZE(r8a7795_mstp_table);
+		break;
+	case CLK_R8A7796:
+		tbl = r8a7796_mstp_table;
+		tbl_size = ARRAY_SIZE(r8a7796_mstp_table);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/* Stop TMU0 */
+	clrbits_le32(TMU_BASE + TSTR0, TSTR0_STR0);
+
+	/* Stop module clock */
+	for (i = 0; i < tbl_size; i++) {
+		clrsetbits_le32(priv->base + SMSTPCR(i), tbl[i].dis, tbl[i].en);
+		clrsetbits_le32(priv->base + RMSTPCR(i), tbl[i].dis, 0x0);
+	}
+
+	return 0;
+}
+
 static const struct udevice_id gen3_clk_ids[] = {
 	{ .compatible = "renesas,r8a7795-cpg-mssr", .data = CLK_R8A7795 },
 	{ .compatible = "renesas,r8a7796-cpg-mssr", .data = CLK_R8A7796 },
@@ -1087,4 +1146,5 @@ U_BOOT_DRIVER(clk_gen3) = {
 	.priv_auto_alloc_size = sizeof(struct gen3_clk_priv),
 	.ops		= &gen3_clk_ops,
 	.probe		= gen3_clk_probe,
+	.remove		= gen3_clk_remove,
 };
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index 8504dceb849..cb9f4258842 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -10,6 +10,7 @@
 #include <errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include "../pinctrl/renesas/sh_pfc.h"
 
 #define GPIO_IOINTSEL	0x00	/* General IO/Interrupt Switching Register */
 #define GPIO_INOUTSEL	0x04	/* General Input/Output Switching Register */
@@ -29,7 +30,8 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 struct rcar_gpio_priv {
-	void __iomem *regs;
+	void __iomem		*regs;
+	int			pfc_offset;
 };
 
 static int rcar_gpio_get_value(struct udevice *dev, unsigned offset)
@@ -113,7 +115,22 @@ static int rcar_gpio_get_function(struct udevice *dev, unsigned offset)
 		return GPIOF_INPUT;
 }
 
+static int rcar_gpio_request(struct udevice *dev, unsigned offset,
+			     const char *label)
+{
+	struct rcar_gpio_priv *priv = dev_get_priv(dev);
+	struct udevice *pctldev;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pctldev);
+	if (ret)
+		return ret;
+
+	return sh_pfc_config_mux_for_gpio(pctldev, priv->pfc_offset + offset);
+}
+
 static const struct dm_gpio_ops rcar_gpio_ops = {
+	.request		= rcar_gpio_request,
 	.direction_input	= rcar_gpio_direction_input,
 	.direction_output	= rcar_gpio_direction_output,
 	.get_value		= rcar_gpio_get_value,
@@ -135,6 +152,7 @@ static int rcar_gpio_probe(struct udevice *dev)
 
 	ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, node, "gpio-ranges",
 					     NULL, 3, 0, &args);
+	priv->pfc_offset = ret == 0 ? args.args[1] : -1;
 	uc_priv->gpio_count = ret == 0 ? args.args[2] : RCAR_MAX_GPIO_PER_BANK;
 
 	ret = clk_get_by_index(dev, 0, &clk);
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 1989f8eb572..cc370b9c57c 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -157,6 +157,12 @@ config SYS_I2C_OMAP24XX
 	help
 	  Add support for the OMAP2+ I2C driver.
 
+config SYS_I2C_RCAR_IIC
+	bool "Renesas RCar Gen3 IIC driver"
+	depends on RCAR_GEN3 && DM_I2C
+	help
+	  Support for Renesas RCar Gen3 IIC controller.
+
 config SYS_I2C_ROCKCHIP
 	bool "Rockchip I2C driver"
 	depends on DM_I2C
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 733cd3e92fa..169a2f1d7a9 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
 obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o
 obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
 obj-$(CONFIG_SYS_I2C_RCAR) += rcar_i2c.o
+obj-$(CONFIG_SYS_I2C_RCAR_IIC) += rcar_iic.o
 obj-$(CONFIG_SYS_I2C_ROCKCHIP) += rk_i2c.o
 obj-$(CONFIG_SYS_I2C_S3C24X0) += s3c24x0_i2c.o exynos_hs_i2c.o
 obj-$(CONFIG_SYS_I2C_SANDBOX) += sandbox_i2c.o i2c-emul-uclass.o
diff --git a/drivers/i2c/rcar_iic.c b/drivers/i2c/rcar_iic.c
new file mode 100644
index 00000000000..57ae2f51fca
--- /dev/null
+++ b/drivers/i2c/rcar_iic.c
@@ -0,0 +1,271 @@
+/*
+ * Renesas RCar IIC driver
+ *
+ * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * Based on
+ * Copyright (C) 2011, 2013 Renesas Solutions Corp.
+ * Copyright (C) 2011, 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <i2c.h>
+#include <asm/io.h>
+
+struct rcar_iic_priv {
+	void __iomem		*base;
+	struct clk		clk;
+	u8			iccl;
+	u8			icch;
+};
+
+#define RCAR_IIC_ICDR		0x00
+#define RCAR_IIC_ICCR		0x04
+#define RCAR_IIC_ICSR		0x08
+#define RCAR_IIC_ICIC		0x0c
+#define RCAR_IIC_ICCL		0x10
+#define RCAR_IIC_ICCH		0x14
+
+/* ICCR */
+#define RCAR_IIC_ICCR_ICE	BIT(7)
+#define RCAR_IIC_ICCR_RACK	BIT(6)
+#define RCAR_IIC_ICCR_RTS	BIT(4)
+#define RCAR_IIC_ICCR_BUSY	BIT(2)
+#define RCAR_IIC_ICCR_SCP	BIT(0)
+
+/* ICSR / ICIC */
+#define RCAR_IC_BUSY		BIT(4)
+#define RCAR_IC_TACK		BIT(2)
+#define RCAR_IC_DTE		BIT(0)
+
+#define IRQ_WAIT 1000
+
+static void sh_irq_dte(struct udevice *dev)
+{
+	struct rcar_iic_priv *priv = dev_get_priv(dev);
+	int i;
+
+	for (i = 0; i < IRQ_WAIT; i++) {
+		if (RCAR_IC_DTE & readb(priv->base + RCAR_IIC_ICSR))
+			break;
+		udelay(10);
+	}
+}
+
+static int sh_irq_dte_with_tack(struct udevice *dev)
+{
+	struct rcar_iic_priv *priv = dev_get_priv(dev);
+	int i;
+
+	for (i = 0; i < IRQ_WAIT; i++) {
+		if (RCAR_IC_DTE & readb(priv->base + RCAR_IIC_ICSR))
+			break;
+		if (RCAR_IC_TACK & readb(priv->base + RCAR_IIC_ICSR))
+			return -ETIMEDOUT;
+		udelay(10);
+	}
+	return 0;
+}
+
+static void sh_irq_busy(struct udevice *dev)
+{
+	struct rcar_iic_priv *priv = dev_get_priv(dev);
+	int i;
+
+	for (i = 0; i < IRQ_WAIT; i++) {
+		if (!(RCAR_IC_BUSY & readb(priv->base + RCAR_IIC_ICSR)))
+			break;
+		udelay(10);
+	}
+}
+
+static int rcar_iic_set_addr(struct udevice *dev, u8 chip, u8 read)
+{
+	struct rcar_iic_priv *priv = dev_get_priv(dev);
+
+	clrbits_8(priv->base + RCAR_IIC_ICCR, RCAR_IIC_ICCR_ICE);
+	setbits_8(priv->base + RCAR_IIC_ICCR, RCAR_IIC_ICCR_ICE);
+
+	writeb(priv->iccl, priv->base + RCAR_IIC_ICCL);
+	writeb(priv->icch, priv->base + RCAR_IIC_ICCH);
+	writeb(RCAR_IC_TACK, priv->base + RCAR_IIC_ICIC);
+
+	writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RTS | RCAR_IIC_ICCR_BUSY,
+	       priv->base + RCAR_IIC_ICCR);
+	sh_irq_dte(dev);
+
+	clrbits_8(priv->base + RCAR_IIC_ICSR, RCAR_IC_TACK);
+	writeb(chip << 1 | read, priv->base + RCAR_IIC_ICDR);
+	return sh_irq_dte_with_tack(dev);
+}
+
+static void rcar_iic_finish(struct udevice *dev)
+{
+	struct rcar_iic_priv *priv = dev_get_priv(dev);
+
+	writeb(0, priv->base + RCAR_IIC_ICSR);
+	clrbits_8(priv->base + RCAR_IIC_ICCR, RCAR_IIC_ICCR_ICE);
+}
+
+static int rcar_iic_read_common(struct udevice *dev, struct i2c_msg *msg)
+{
+	struct rcar_iic_priv *priv = dev_get_priv(dev);
+	int i, ret = -EREMOTEIO;
+
+	if (rcar_iic_set_addr(dev, msg->addr, 1) != 0)
+		goto err;
+
+	udelay(10);
+
+	writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_SCP,
+	       priv->base + RCAR_IIC_ICCR);
+
+	for (i = 0; i < msg->len; i++) {
+		if (sh_irq_dte_with_tack(dev) != 0)
+			goto err;
+
+		msg->buf[i] = readb(priv->base + RCAR_IIC_ICDR) & 0xff;
+
+		if (msg->len - 1 == i) {
+			writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RACK,
+			       priv->base + RCAR_IIC_ICCR);
+		}
+	}
+
+	sh_irq_busy(dev);
+	ret = 0;
+
+err:
+	rcar_iic_finish(dev);
+	return ret;
+}
+
+static int rcar_iic_write_common(struct udevice *dev, struct i2c_msg *msg)
+{
+	struct rcar_iic_priv *priv = dev_get_priv(dev);
+	int i, ret = -EREMOTEIO;
+
+	if (rcar_iic_set_addr(dev, msg->addr, 0) != 0)
+		goto err;
+
+	udelay(10);
+
+	for (i = 0; i < msg->len; i++) {
+		writeb(msg->buf[i], priv->base + RCAR_IIC_ICDR);
+		if (sh_irq_dte_with_tack(dev) != 0)
+			goto err;
+	}
+
+	if (msg->flags & I2C_M_STOP) {
+		writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RTS,
+		       priv->base + RCAR_IIC_ICCR);
+		if (sh_irq_dte_with_tack(dev) != 0)
+			goto err;
+	}
+
+	sh_irq_busy(dev);
+	ret = 0;
+
+err:
+	rcar_iic_finish(dev);
+	return ret;
+}
+
+static int rcar_iic_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
+{
+	int ret;
+
+	for (; nmsgs > 0; nmsgs--, msg++) {
+		if (msg->flags & I2C_M_RD)
+			ret = rcar_iic_read_common(dev, msg);
+		else
+			ret = rcar_iic_write_common(dev, msg);
+
+		if (ret)
+			return -EREMOTEIO;
+	}
+
+	return ret;
+}
+
+static int rcar_iic_set_speed(struct udevice *dev, uint speed)
+{
+	struct rcar_iic_priv *priv = dev_get_priv(dev);
+	const unsigned int ratio_high = 4;
+	const unsigned int ratio_low = 5;
+	int clkrate, denom;
+
+	clkrate = clk_get_rate(&priv->clk);
+	if (clkrate < 0)
+		return clkrate;
+
+	/*
+	 * Calculate the value for ICCL and ICCH. From the data sheet:
+	 * iccl = (p-clock / transfer-rate) * (L / (L + H))
+	 * icch = (p clock / transfer rate) * (H / (L + H))
+	 * where L and H are the SCL low and high ratio.
+	 */
+	denom = speed * (ratio_high + ratio_low);
+	priv->iccl = DIV_ROUND_CLOSEST(clkrate * ratio_low, denom);
+	priv->icch = DIV_ROUND_CLOSEST(clkrate * ratio_high, denom);
+
+	return 0;
+}
+
+static int rcar_iic_probe_chip(struct udevice *dev, uint addr, uint flags)
+{
+	struct rcar_iic_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	rcar_iic_set_addr(dev, addr, 1);
+	writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_SCP,
+	       priv->base + RCAR_IIC_ICCR);
+	ret = sh_irq_dte_with_tack(dev);
+	rcar_iic_finish(dev);
+
+	return ret;
+}
+
+static int rcar_iic_probe(struct udevice *dev)
+{
+	struct rcar_iic_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	priv->base = dev_read_addr_ptr(dev);
+
+	ret = clk_get_by_index(dev, 0, &priv->clk);
+	if (ret)
+		return ret;
+
+	ret = clk_enable(&priv->clk);
+	if (ret)
+		return ret;
+
+	rcar_iic_finish(dev);
+
+	return rcar_iic_set_speed(dev, 100000);
+}
+
+static const struct dm_i2c_ops rcar_iic_ops = {
+	.xfer		= rcar_iic_xfer,
+	.probe_chip	= rcar_iic_probe_chip,
+	.set_bus_speed	= rcar_iic_set_speed,
+};
+
+static const struct udevice_id rcar_iic_ids[] = {
+	{ .compatible = "renesas,rmobile-iic" },
+	{ }
+};
+
+U_BOOT_DRIVER(iic_rcar) = {
+	.name		= "iic_rcar",
+	.id		= UCLASS_I2C,
+	.of_match	= rcar_iic_ids,
+	.probe		= rcar_iic_probe,
+	.priv_auto_alloc_size = sizeof(struct rcar_iic_priv),
+	.ops		= &rcar_iic_ops,
+};
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index dc7a52534e5..26d95f178f7 100644
--- a/drivers/net/ravb.c
+++ b/drivers/net/ravb.c
@@ -492,8 +492,8 @@ static int ravb_probe(struct udevice *dev)
 	if (ret < 0)
 		goto err_mdio_alloc;
 
-	gpio_request_by_name_nodev(dev_ofnode(dev), "reset-gpios", 0,
-				   &eth->reset_gpio, GPIOD_IS_OUT);
+	gpio_request_by_name(dev, "reset-gpios", 0, &eth->reset_gpio,
+			     GPIOD_IS_OUT);
 
 	mdiodev = mdio_alloc();
 	if (!mdiodev) {
@@ -528,7 +528,8 @@ static int ravb_remove(struct udevice *dev)
 	free(eth->phydev);
 	mdio_unregister(eth->bus);
 	mdio_free(eth->bus);
-	dm_gpio_free(dev, &eth->reset_gpio);
+	if (dm_gpio_is_valid(&eth->reset_gpio))
+		dm_gpio_free(dev, &eth->reset_gpio);
 	unmap_physmem(eth->iobase, MAP_NOCACHE);
 
 	return 0;
diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c
index 1675485d669..66700725045 100644
--- a/drivers/pinctrl/renesas/pfc.c
+++ b/drivers/pinctrl/renesas/pfc.c
@@ -448,6 +448,51 @@ static const char *sh_pfc_pinctrl_get_function_name(struct udevice *dev,
 	return priv->pfc.info->functions[selector].name;
 }
 
+int sh_pfc_config_mux_for_gpio(struct udevice *dev, unsigned pin_selector)
+{
+	struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev);
+	struct sh_pfc_pinctrl *pmx = &priv->pmx;
+	struct sh_pfc *pfc = &priv->pfc;
+	struct sh_pfc_pin_config *cfg;
+	const struct sh_pfc_pin *pin = NULL;
+	int i, idx;
+
+	for (i = 1; i < pfc->info->nr_pins; i++) {
+		if (priv->pfc.info->pins[i].pin != pin_selector)
+			continue;
+
+		pin = &priv->pfc.info->pins[i];
+		break;
+	}
+
+	if (!pin)
+		return -EINVAL;
+
+	idx = sh_pfc_get_pin_index(pfc, pin->pin);
+	cfg = &pmx->configs[idx];
+
+	if (cfg->type != PINMUX_TYPE_NONE)
+		return -EBUSY;
+
+	return sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO);
+}
+
+static int sh_pfc_pinctrl_pin_set(struct udevice *dev, unsigned pin_selector,
+				  unsigned func_selector)
+{
+	struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev);
+	struct sh_pfc_pinctrl *pmx = &priv->pmx;
+	struct sh_pfc *pfc = &priv->pfc;
+	const struct sh_pfc_pin *pin = &priv->pfc.info->pins[pin_selector];
+	int idx = sh_pfc_get_pin_index(pfc, pin->pin);
+	struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
+
+	if (cfg->type != PINMUX_TYPE_NONE)
+		return -EBUSY;
+
+	return sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_FUNCTION);
+}
+
 static int sh_pfc_pinctrl_group_set(struct udevice *dev, unsigned group_selector,
 				     unsigned func_selector)
 {
@@ -642,6 +687,19 @@ static int sh_pfc_pinconf_set(struct sh_pfc_pinctrl *pmx, unsigned _pin,
 	return 0;
 }
 
+static int sh_pfc_pinconf_pin_set(struct udevice *dev,
+				  unsigned int pin_selector,
+				  unsigned int param, unsigned int arg)
+{
+	struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev);
+	struct sh_pfc_pinctrl *pmx = &priv->pmx;
+	struct sh_pfc *pfc = &priv->pfc;
+	const struct sh_pfc_pin *pin = &pfc->info->pins[pin_selector];
+
+	sh_pfc_pinconf_set(pmx, pin->pin, param, arg);
+
+	return 0;
+}
 
 static int sh_pfc_pinconf_group_set(struct udevice *dev,
 				      unsigned int group_selector,
@@ -671,8 +729,10 @@ static struct pinctrl_ops sh_pfc_pinctrl_ops = {
 #if CONFIG_IS_ENABLED(PINCONF)
 	.pinconf_num_params	= ARRAY_SIZE(sh_pfc_pinconf_params),
 	.pinconf_params		= sh_pfc_pinconf_params,
+	.pinconf_set		= sh_pfc_pinconf_pin_set,
 	.pinconf_group_set	= sh_pfc_pinconf_group_set,
 #endif
+	.pinmux_set		= sh_pfc_pinctrl_pin_set,
 	.pinmux_group_set	= sh_pfc_pinctrl_group_set,
 	.set_state		= pinctrl_generic_set_state,
 };
diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h
index 7aef2d360b2..f82417b1a34 100644
--- a/drivers/pinctrl/renesas/sh_pfc.h
+++ b/drivers/pinctrl/renesas/sh_pfc.h
@@ -243,6 +243,7 @@ void sh_pfc_write_reg(struct sh_pfc *pfc, u32 reg, unsigned int width, u32 data)
 const struct sh_pfc_bias_info *
 sh_pfc_pin_to_bias_info(const struct sh_pfc_bias_info *info,
 			unsigned int num, unsigned int pin);
+int sh_pfc_config_mux_for_gpio(struct udevice *dev, unsigned pin_selector);
 
 extern const struct sh_pfc_soc_info r8a7795_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7796_pinmux_info;
diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index 4d271222434..1b8d742f1cf 100644
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -226,8 +226,7 @@ struct uart_port {
 # define SCSCR_INIT(port)	0x38	/* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
 #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
 	defined(CONFIG_R8A7792) || defined(CONFIG_R8A7793) || \
-	defined(CONFIG_R8A7794) || defined(CONFIG_R8A7795) || \
-	defined(CONFIG_R8A7796)
+	defined(CONFIG_R8A7794) || defined(CONFIG_RCAR_GEN3)
 # if defined(CONFIG_SCIF_A)
 #  define SCIF_ORER	0x0200
 # else