diff options
| author | Ye Li <ye.li@nxp.com> | 2018-05-03 02:28:19 -0700 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2018-05-23 04:15:51 -0700 |
| commit | 3c29cba6abea6ebbe9d8b529778ce9b599b493fd (patch) | |
| tree | 1c405f12cde64e46d0e6304153e9e1e704b2147c /drivers | |
| parent | bce752cfe43b3378dbd84b64d46f1d1818e0300f (diff) | |
MLK-18243-15 spi: fspi: Fix 3bytes access
The address size is 3 bytes when using BAR mode, but the driver
supposes the 4bytes mode is enabled and uses 4 bytes address. This
cause address issue.
Also the mask needs set to 23bits for 3 bytes address.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 2e9a9e0fe379306f7c1065f9afa9e67386be2503)
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/spi/fsl_fspi.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/spi/fsl_fspi.c b/drivers/spi/fsl_fspi.c index bad5a2d05f..05ec99f431 100644 --- a/drivers/spi/fsl_fspi.c +++ b/drivers/spi/fsl_fspi.c @@ -21,7 +21,11 @@ DECLARE_GLOBAL_DATA_PTR; #define TX_BUFFER_SIZE 0x400 #define AHB_BUFFER_SIZE 0x800 +#ifdef CONFIG_SPI_FLASH_4BYTES_ADDR #define OFFSET_BITS_MASK GENMASK(31, 0) +#else +#define OFFSET_BITS_MASK GENMASK(23, 0) +#endif #define FLASH_STATUS_WEL 0x02 @@ -925,8 +929,10 @@ int fspi_xfer(struct fsl_fspi_priv *priv, unsigned int bitlen, if (dout) { if (flags & SPI_XFER_BEGIN) { priv->cur_seqid = *(u8 *)dout; +#ifdef CONFIG_SPI_FLASH_4BYTES_ADDR if (FSL_FSPI_FLASH_SIZE > SZ_16M) dout = (u8 *)dout + 1; +#endif memcpy(&txbuf, dout, 4); } |