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authorMasahiro Yamada <yamada.masahiro@socionext.com>2018-04-20 18:14:25 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2018-04-24 00:35:34 +0900
commitfc2d0302b666cd127fca3a8a800f33841de11c41 (patch)
tree81208e13938fd02ce5db0ac4fb8d5aa0751a695d /drivers
parent30b5d9aa9aee9853b6b51d93ddf16d762d20c538 (diff)
mmc: uniphier-sd: skip clock set-up for SPL
The size of SPL is hitting the limit (64KB) for uniphier_v7_defconfig. When booting from SD/eMMC, obviously its clock has been properly set up by the boot ROM. Acutually, no need to re-initialize the clock in SPL. Using a clock driver would generalize the SoC specific code, but solving the memory footprint problem would win. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/uniphier-sd.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c
index bc6e41dbf6..61f8da4e41 100644
--- a/drivers/mmc/uniphier-sd.c
+++ b/drivers/mmc/uniphier-sd.c
@@ -33,6 +33,7 @@ static const struct udevice_id uniphier_sd_match[] = {
static int uniphier_sd_probe(struct udevice *dev)
{
struct tmio_sd_priv *priv = dev_get_priv(dev);
+#ifndef CONFIG_SPL_BUILD
struct clk clk;
int ret;
@@ -56,6 +57,9 @@ static int uniphier_sd_probe(struct udevice *dev)
dev_err(dev, "failed to enable host clock\n");
return ret;
}
+#else
+ priv->mclk = 100000000;
+#endif
return tmio_sd_probe(dev, 0);
}