diff options
| author | Christoph Muellner <christoph.muellner@theobroma-systems.com> | 2019-01-02 15:09:20 +0100 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2019-01-02 22:39:12 +0100 |
| commit | 8188c83cfa2919a2a8e1d4d1d0daebdad6a1bc99 (patch) | |
| tree | 0bdc727e4e4d0b095a71ee2628681fa58f721119 /drivers | |
| parent | 600888110d32a6c2c343e1cc3fa3ef040f4031d7 (diff) | |
rockchip: rk3399: Add Kconfig option for full pinctrl driver
This patch adds a Kconfig option to enable the full pinctrl driver
for the RK3399. This flag needs to be enabed in order to get the
features of the full pinctrl driver compiled in (i.e. a .set_state()
callback).
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pinctrl/Kconfig | 10 | ||||
| -rw-r--r-- | drivers/pinctrl/rockchip/pinctrl_rk3399.c | 9 |
2 files changed, 19 insertions, 0 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 1dbe2b104b..30a6aa6ee8 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -238,6 +238,16 @@ config PINCTRL_ROCKCHIP_RK3399 the GPIO definitions and pin control functions for each available multiplex function. +config PINCTRL_ROCKCHIP_RK3399_FULL + bool "Rockchip rk3399 pin control driver (full)" + depends on PINCTRL_FULL && PINCTRL_ROCKCHIP_RK3399 + help + Support full pin multiplexing control on Rockchip rk3399 SoCs. + + This enables the full pinctrl driver for the RK3399. + Contrary to the non-full pinctrl driver, this will evaluate + the board DTB to get the pinctrl settings. + config PINCTRL_ROCKCHIP_RV1108 bool "Rockchip rv1108 pin control driver" depends on DM diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c index a1d5e8d0d5..c4746b0122 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c @@ -15,8 +15,10 @@ #include <asm/arch/clock.h> #include <dm/pinctrl.h> +#if CONFIG_IS_ENABLED(PINCTRL_ROCKCHIP_RK3399_FULL) static const u32 RK_GRF_P_PULLUP = 1; static const u32 RK_GRF_P_PULLDOWN = 2; +#endif /* PINCTRL_ROCKCHIP_RK3399_FULL */ struct rk3399_pinctrl_priv { struct rk3399_grf_regs *grf; @@ -24,6 +26,7 @@ struct rk3399_pinctrl_priv { struct rockchip_pin_bank *banks; }; +#if CONFIG_IS_ENABLED(PINCTRL_ROCKCHIP_RK3399_FULL) /* Location of pinctrl/pinconf registers. */ enum rk_grf_location { RK_GRF, @@ -244,6 +247,8 @@ end: return ret; } +#endif /* PINCTRL_ROCKCHIP_RK3399_FULL */ + static void pinctrl_rk3399_pwm_config(struct rk3399_grf_regs *grf, struct rk3399_pmugrf_regs *pmugrf, int pwm_id) { @@ -693,7 +698,9 @@ static int rk3399_pinctrl_set_state_simple(struct udevice *dev, } static struct pinctrl_ops rk3399_pinctrl_ops = { +#if CONFIG_IS_ENABLED(PINCTRL_ROCKCHIP_RK3399_FULL) .set_state = rk3399_pinctrl_set_state, +#endif .set_state_simple = rk3399_pinctrl_set_state_simple, .request = rk3399_pinctrl_request, .get_periph_id = rk3399_pinctrl_get_periph_id, @@ -707,7 +714,9 @@ static int rk3399_pinctrl_probe(struct udevice *dev) priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); debug("%s: grf=%p, pmugrf=%p\n", __func__, priv->grf, priv->pmugrf); +#if CONFIG_IS_ENABLED(PINCTRL_ROCKCHIP_RK3399_FULL) priv->banks = rk3399_pin_banks; +#endif /* PINCTRL_ROCKCHIP_RK3399_FULL */ return ret; } |