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authorGoldschmidt Simon <sgoldschmidt@de.pepperl-fuchs.com>2017-11-10 14:17:41 +0000
committerMichal Simek <michal.simek@xilinx.com>2017-12-14 16:09:39 +0100
commit8b93a92f6d089c8b3a055c8d89492e73137490b7 (patch)
treef5b9827101a6e676faa26f8b81f0378935afe280 /drivers
parent659208da4703de50826a469cbb38bf6afb938978 (diff)
fpga: allow programming fpga from FIT image for all FPGA drivers
This drops the limit that fpga is only loaded from FIT images for Xilinx. This is done by moving the 'partial' check from 'common/image.c' to 'drivers/fpga/xilinx.c' (the only driver supporting partial images yet) and supplies a weak default implementation in 'drivers/fpga/fpga.c'. Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (On zcu102) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/fpga/fpga.c9
-rw-r--r--drivers/fpga/xilinx.c13
2 files changed, 22 insertions, 0 deletions
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index e0fb1b4e78..6aead27f16 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -171,6 +171,15 @@ int fpga_add(fpga_type devtype, void *desc)
}
/*
+ * Return 1 if the fpga data is partial.
+ * This is only required for fpga drivers that support bitstream_type.
+ */
+int __weak fpga_is_partial_data(int devnum, size_t img_len)
+{
+ return 0;
+}
+
+/*
* Convert bitstream data and load into the fpga
*/
int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 941f30010a..3c05760969 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -24,6 +24,19 @@ static int xilinx_validate(xilinx_desc *desc, char *fn);
/* ------------------------------------------------------------------------- */
+int fpga_is_partial_data(int devnum, size_t img_len)
+{
+ const fpga_desc * const desc = fpga_get_desc(devnum);
+ xilinx_desc *desc_xilinx = desc->devdesc;
+
+ /* Check datasize against FPGA size */
+ if (img_len >= desc_xilinx->size)
+ return 0;
+
+ /* datasize is smaller, must be partial data */
+ return 1;
+}
+
int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
bitstream_type bstype)
{