diff options
| author | Priyanka Jain <Priyanka.Jain@freescale.com> | 2013-11-28 10:08:12 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-12-04 14:54:34 -0800 |
| commit | 7aa6c455c357f6d767acec747bbecb23664eeacb (patch) | |
| tree | e2808835a3aabca97d6a3aff965ece9335648ae7 /drivers | |
| parent | 380b8f307c5291016e1249ccd263876f0e9c1278 (diff) | |
powerpc: spiflash:Add corenet devices support in eSPI SPL
Existing eSPI SPL framework assumes booting from spi-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.
So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mtd/spi/fsl_espi_spl.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/mtd/spi/fsl_espi_spl.c b/drivers/mtd/spi/fsl_espi_spl.c index 6263d8c2217..e5ac79b9520 100644 --- a/drivers/mtd/spi/fsl_espi_spl.c +++ b/drivers/mtd/spi/fsl_espi_spl.c @@ -31,6 +31,10 @@ void spi_boot(void) hang(); } +#ifdef CONFIG_FSL_CORENET + offset = CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS; + code_len = CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE; +#else /* * Load U-Boot image from SPI flash into RAM */ @@ -50,6 +54,7 @@ void spi_boot(void) code_len = *(u32 *)(buf + ESPI_BOOT_IMAGE_SIZE); /* Skip spl code */ code_len = code_len - CONFIG_SPL_MAX_SIZE; +#endif /* copy code to DDR */ spi_flash_read(flash, offset, code_len, (void *)CONFIG_SYS_SPI_FLASH_U_BOOT_DST); |