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authorJerry Huang <Chang-Ming.Huang@freescale.com>2010-03-18 15:57:06 -0500
committerKumar Gala <galak@kernel.crashing.org>2010-04-07 00:01:11 -0500
commit48bb3bb5ac4dd21e931ae157caad6449bcb2d0d4 (patch)
treec5d04449f57b2ef4817a2b5e050d8437683fa1b1 /drivers
parentcc4d1226585fa2544b5116702b02eacbb7aa48a1 (diff)
fsl_esdhc: Add function to reset the eSDHC controller
To support multiple block read command we must set abort or use auto CMD12. If we booted from eSDHC controller neither of these are used and thus we need to reset the controller to allow multiple block read to function. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/fsl_esdhc.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 85354e893a..999b58103a 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -344,6 +344,20 @@ static int esdhc_init(struct mmc *mmc)
return ret;
}
+static void esdhc_reset(struct fsl_esdhc *regs)
+{
+ unsigned long timeout = 100; /* wait max 100 ms */
+
+ /* reset the controller */
+ esdhc_write32(&regs->sysctl, SYSCTL_RSTA);
+
+ /* hardware clears the bit when it is done */
+ while ((esdhc_read32(&regs->sysctl) & SYSCTL_RSTA) && --timeout)
+ udelay(1000);
+ if (!timeout)
+ printf("MMC/SD: Reset never completed.\n");
+}
+
int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
{
struct fsl_esdhc *regs;
@@ -358,6 +372,9 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
sprintf(mmc->name, "FSL_ESDHC");
regs = (struct fsl_esdhc *)cfg->esdhc_base;
+ /* First reset the eSDHC controller */
+ esdhc_reset(regs);
+
mmc->priv = cfg;
mmc->send_cmd = esdhc_send_cmd;
mmc->set_ios = esdhc_set_ios;