diff options
| author | Aswath Govindraju <a-govindraju@ti.com> | 2021-07-27 19:13:13 +0530 |
|---|---|---|
| committer | Praneeth Bajjuri <praneeth@ti.com> | 2021-09-08 17:36:14 -0500 |
| commit | fc5aea9d32f475419ec2fe5f3bc2597c9fa0fa49 (patch) | |
| tree | d1375b38b0fe68f72010ff06c685d1a02170aee1 /drivers | |
| parent | 7a7db34da08cee3141d45e694428a1f28c76219c (diff) | |
usb: cdns3: gadget.c: Set fast access bit
When the device port is in a low power state [U3/L2/Not Connected],
accesses to usb device registers may take a long time. This could lead to
potential core hang when the controller registers are accessed after the
port is disabled by setting DEVDS field. Setting the fast register access
bit ensures that the PHY clock is keeping up in active state.
Therefore, set fast access bit to ensure the accesses to device registers
are quick even in low power states.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/usb/cdns3/gadget.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c index 83dbb5a103..64acd9071b 100644 --- a/drivers/usb/cdns3/gadget.c +++ b/drivers/usb/cdns3/gadget.c @@ -2321,6 +2321,9 @@ static void cdns3_gadget_config(struct cdns3_device *priv_dev) writel(USB_IEN_INIT, ®s->usb_ien); writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, ®s->usb_conf); + /* Set the Fast access bit */ + writel(PUSB_PWR_FST_REG_ACCESS, &priv_dev->regs->usb_pwr); + cdns3_configure_dmult(priv_dev, NULL); cdns3_gadget_pullup(&priv_dev->gadget, 1); @@ -2378,6 +2381,7 @@ static int cdns3_gadget_udc_stop(struct usb_gadget *gadget) /* disable interrupt for device */ writel(0, &priv_dev->regs->usb_ien); + writel(0, &priv_dev->regs->usb_pwr); writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf); return ret; |