net: Remove ax88180 driver

This driver is not enabled by any board and not converted to DM_ETH.
Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>

3 files changed, 0 insertions, 1152 deletions

diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index b57149b339..1d753bb7c2 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -18,7 +18,6 @@ obj-$(CONFIG_CORTINA_NI_ENET) += cortina_ni.o
 obj-$(CONFIG_CS8900) += cs8900.o
 obj-$(CONFIG_DM_ETH_PHY) += eth-phy-uclass.o
 obj-$(CONFIG_DNET) += dnet.o
-obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
 obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o
 obj-$(CONFIG_DSA_SANDBOX) += dsa_sandbox.o
 obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o
diff --git a/drivers/net/ax88180.c b/drivers/net/ax88180.c
deleted file mode 100644
index 402bcdb63e..0000000000
--- a/drivers/net/ax88180.c
+++ /dev/null
@@ -1,755 +0,0 @@
-/*
- * ax88180: ASIX AX88180 Non-PCI Gigabit Ethernet u-boot driver
- *
- * This program is free software; you can distribute it and/or modify
- * it under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- * This program is distributed in the hope it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * See the GNU General Public License for more details.
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307,
- * USA.
- */
-
-/*
- * ========================================================================
- * ASIX AX88180 Non-PCI 16/32-bit Gigabit Ethernet Linux Driver
- *
- * The AX88180 Ethernet controller is a high performance and highly
- * integrated local CPU bus Ethernet controller with embedded 40K bytes
- * SRAM and supports both 16-bit and 32-bit SRAM-Like interfaces for any
- * embedded systems.
- * The AX88180 is a single chip 10/100/1000Mbps Gigabit Ethernet
- * controller that supports both MII and RGMII interfaces and is
- * compliant to IEEE 802.3, IEEE 802.3u and IEEE 802.3z standards.
- *
- * Please visit ASIX's web site (http://www.asix.com.tw) for more
- * details.
- *
- * Module Name	: ax88180.c
- * Date		: 2008-07-07
- * History
- * 09/06/2006	: New release for AX88180 US2 chip.
- * 07/07/2008	: Fix up the coding style and using inline functions
- *		  instead of macros
- * ========================================================================
- */
-#include <common.h>
-#include <command.h>
-#include <log.h>
-#include <net.h>
-#include <malloc.h>
-#include <linux/delay.h>
-#include <linux/mii.h>
-#include "ax88180.h"
-
-/*
- * ===========================================================================
- * Local SubProgram Declaration
- * ===========================================================================
- */
-static void ax88180_rx_handler (struct eth_device *dev);
-static int ax88180_phy_initial (struct eth_device *dev);
-static void ax88180_media_config (struct eth_device *dev);
-static unsigned long get_CicadaPHY_media_mode (struct eth_device *dev);
-static unsigned long get_MarvellPHY_media_mode (struct eth_device *dev);
-static unsigned short ax88180_mdio_read (struct eth_device *dev,
-					 unsigned long regaddr);
-static void ax88180_mdio_write (struct eth_device *dev,
-				unsigned long regaddr, unsigned short regdata);
-
-/*
- * ===========================================================================
- * Local SubProgram Bodies
- * ===========================================================================
- */
-static int ax88180_mdio_check_complete (struct eth_device *dev)
-{
-	int us_cnt = 10000;
-	unsigned short tmpval;
-
-	/* MDIO read/write should not take more than 10 ms */
-	while (--us_cnt) {
-		tmpval = INW (dev, MDIOCTRL);
-		if (((tmpval & READ_PHY) == 0) && ((tmpval & WRITE_PHY) == 0))
-			break;
-	}
-
-	return us_cnt;
-}
-
-static unsigned short
-ax88180_mdio_read (struct eth_device *dev, unsigned long regaddr)
-{
-	struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
-	unsigned long tmpval = 0;
-
-	OUTW (dev, (READ_PHY | (regaddr << 8) | priv->PhyAddr), MDIOCTRL);
-
-	if (ax88180_mdio_check_complete (dev))
-		tmpval = INW (dev, MDIODP);
-	else
-		printf ("Failed to read PHY register!\n");
-
-	return (unsigned short)(tmpval & 0xFFFF);
-}
-
-static void
-ax88180_mdio_write (struct eth_device *dev, unsigned long regaddr,
-		    unsigned short regdata)
-{
-	struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
-
-	OUTW (dev, regdata, MDIODP);
-
-	OUTW (dev, (WRITE_PHY | (regaddr << 8) | priv->PhyAddr), MDIOCTRL);
-
-	if (!ax88180_mdio_check_complete (dev))
-		printf ("Failed to write PHY register!\n");
-}
-
-static int ax88180_phy_reset (struct eth_device *dev)
-{
-	unsigned short delay_cnt = 500;
-
-	ax88180_mdio_write (dev, MII_BMCR, (BMCR_RESET | BMCR_ANENABLE));
-
-	/* Wait for the reset to complete, or time out (500 ms) */
-	while (ax88180_mdio_read (dev, MII_BMCR) & BMCR_RESET) {
-		udelay(1000);
-		if (--delay_cnt == 0) {
-			printf ("Failed to reset PHY!\n");
-			return -1;
-		}
-	}
-
-	return 0;
-}
-
-static void ax88180_mac_reset (struct eth_device *dev)
-{
-	unsigned long tmpval;
-	unsigned char i;
-
-	struct {
-		unsigned short offset, value;
-	} program_seq[] = {
-		{
-		MISC, MISC_NORMAL}, {
-		RXINDICATOR, DEFAULT_RXINDICATOR}, {
-		TXCMD, DEFAULT_TXCMD}, {
-		TXBS, DEFAULT_TXBS}, {
-		TXDES0, DEFAULT_TXDES0}, {
-		TXDES1, DEFAULT_TXDES1}, {
-		TXDES2, DEFAULT_TXDES2}, {
-		TXDES3, DEFAULT_TXDES3}, {
-		TXCFG, DEFAULT_TXCFG}, {
-		MACCFG2, DEFAULT_MACCFG2}, {
-		MACCFG3, DEFAULT_MACCFG3}, {
-		TXLEN, DEFAULT_TXLEN}, {
-		RXBTHD0, DEFAULT_RXBTHD0}, {
-		RXBTHD1, DEFAULT_RXBTHD1}, {
-		RXFULTHD, DEFAULT_RXFULTHD}, {
-		DOGTHD0, DEFAULT_DOGTHD0}, {
-	DOGTHD1, DEFAULT_DOGTHD1},};
-
-	OUTW (dev, MISC_RESET_MAC, MISC);
-	tmpval = INW (dev, MISC);
-
-	for (i = 0; i < ARRAY_SIZE(program_seq); i++)
-		OUTW (dev, program_seq[i].value, program_seq[i].offset);
-}
-
-static int ax88180_poll_tx_complete (struct eth_device *dev)
-{
-	struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
-	unsigned long tmpval, txbs_txdp;
-	int TimeOutCnt = 10000;
-
-	txbs_txdp = 1 << priv->NextTxDesc;
-
-	while (TimeOutCnt--) {
-
-		tmpval = INW (dev, TXBS);
-
-		if ((tmpval & txbs_txdp) == 0)
-			break;
-
-		udelay(100);
-	}
-
-	if (TimeOutCnt)
-		return 0;
-	else
-		return -TimeOutCnt;
-}
-
-static void ax88180_rx_handler (struct eth_device *dev)
-{
-	struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
-	unsigned long data_size;
-	unsigned short rxcurt_ptr, rxbound_ptr, next_ptr;
-	int i;
-#if defined (CONFIG_DRIVER_AX88180_16BIT)
-	unsigned short *rxdata = (unsigned short *)net_rx_packets[0];
-#else
-	unsigned long *rxdata = (unsigned long *)net_rx_packets[0];
-#endif
-	unsigned short count;
-
-	rxcurt_ptr = INW (dev, RXCURT);
-	rxbound_ptr = INW (dev, RXBOUND);
-	next_ptr = (rxbound_ptr + 1) & RX_PAGE_NUM_MASK;
-
-	debug ("ax88180: RX original RXBOUND=0x%04x,"
-	       " RXCURT=0x%04x\n", rxbound_ptr, rxcurt_ptr);
-
-	while (next_ptr != rxcurt_ptr) {
-
-		OUTW (dev, RX_START_READ, RXINDICATOR);
-
-		data_size = READ_RXBUF (dev) & 0xFFFF;
-
-		if ((data_size == 0) || (data_size > MAX_RX_SIZE)) {
-
-			OUTW (dev, RX_STOP_READ, RXINDICATOR);
-
-			ax88180_mac_reset (dev);
-			printf ("ax88180: Invalid Rx packet length!"
-				" (len=0x%04lx)\n", data_size);
-
-			debug ("ax88180: RX RXBOUND=0x%04x,"
-			       "RXCURT=0x%04x\n", rxbound_ptr, rxcurt_ptr);
-			return;
-		}
-
-		rxbound_ptr += (((data_size + 0xF) & 0xFFF0) >> 4) + 1;
-		rxbound_ptr &= RX_PAGE_NUM_MASK;
-
-		/* Comput access times */
-		count = (data_size + priv->PadSize) >> priv->BusWidth;
-
-		for (i = 0; i < count; i++) {
-			*(rxdata + i) = READ_RXBUF (dev);
-		}
-
-		OUTW (dev, RX_STOP_READ, RXINDICATOR);
-
-		/* Pass the packet up to the protocol layers. */
-		net_process_received_packet(net_rx_packets[0], data_size);
-
-		OUTW (dev, rxbound_ptr, RXBOUND);
-
-		rxcurt_ptr = INW (dev, RXCURT);
-		rxbound_ptr = INW (dev, RXBOUND);
-		next_ptr = (rxbound_ptr + 1) & RX_PAGE_NUM_MASK;
-
-		debug ("ax88180: RX updated RXBOUND=0x%04x,"
-		       "RXCURT=0x%04x\n", rxbound_ptr, rxcurt_ptr);
-	}
-
-	return;
-}
-
-static int ax88180_phy_initial (struct eth_device *dev)
-{
-	struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
-	unsigned long tmp_regval;
-	unsigned short phyaddr;
-
-	/* Search for first avaliable PHY chipset */
-#ifdef CONFIG_PHY_ADDR
-	phyaddr = CONFIG_PHY_ADDR;
-#else
-	for (phyaddr = 0; phyaddr < 32; ++phyaddr)
-#endif
-	{
-		priv->PhyAddr = phyaddr;
-		priv->PhyID0 = ax88180_mdio_read(dev, MII_PHYSID1);
-		priv->PhyID1 = ax88180_mdio_read(dev, MII_PHYSID2);
-
-		switch (priv->PhyID0) {
-		case MARVELL_ALASKA_PHYSID0:
-			debug("ax88180: Found Marvell Alaska PHY family."
-			      " (PHY Addr=0x%x)\n", priv->PhyAddr);
-
-			switch (priv->PhyID1) {
-			case MARVELL_88E1118_PHYSID1:
-				ax88180_mdio_write(dev, M88E1118_PAGE_SEL, 2);
-				ax88180_mdio_write(dev, M88E1118_CR,
-					M88E1118_CR_DEFAULT);
-				ax88180_mdio_write(dev, M88E1118_PAGE_SEL, 3);
-				ax88180_mdio_write(dev, M88E1118_LEDCTL,
-					M88E1118_LEDCTL_DEFAULT);
-				ax88180_mdio_write(dev, M88E1118_LEDMIX,
-					M88E1118_LEDMIX_LED050 | M88E1118_LEDMIX_LED150 | 0x15);
-				ax88180_mdio_write(dev, M88E1118_PAGE_SEL, 0);
-			default: /* Default to 88E1111 Phy */
-				tmp_regval = ax88180_mdio_read(dev, M88E1111_EXT_SSR);
-				if ((tmp_regval & HWCFG_MODE_MASK) != RGMII_COPPER_MODE)
-					ax88180_mdio_write(dev, M88E1111_EXT_SCR,
-						DEFAULT_EXT_SCR);
-			}
-
-			if (ax88180_phy_reset(dev) < 0)
-				return 0;
-			ax88180_mdio_write(dev, M88_IER, LINK_CHANGE_INT);
-
-			return 1;
-
-		case CICADA_CIS8201_PHYSID0:
-			debug("ax88180: Found CICADA CIS8201 PHY"
-			      " chipset. (PHY Addr=0x%x)\n", priv->PhyAddr);
-
-			ax88180_mdio_write(dev, CIS_IMR,
-					    (CIS_INT_ENABLE | LINK_CHANGE_INT));
-
-			/* Set CIS_SMI_PRIORITY bit before force the media mode */
-			tmp_regval = ax88180_mdio_read(dev, CIS_AUX_CTRL_STATUS);
-			tmp_regval &= ~CIS_SMI_PRIORITY;
-			ax88180_mdio_write(dev, CIS_AUX_CTRL_STATUS, tmp_regval);
-
-			return 1;
-
-		case 0xffff:
-			/* No PHY at this addr */
-			break;
-
-		default:
-			printf("ax88180: Unknown PHY chipset %#x at addr %#x\n",
-			       priv->PhyID0, priv->PhyAddr);
-			break;
-		}
-	}
-
-	printf("ax88180: Unknown PHY chipset!!\n");
-	return 0;
-}
-
-static void ax88180_media_config (struct eth_device *dev)
-{
-	struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
-	unsigned long bmcr_val, bmsr_val;
-	unsigned long rxcfg_val, maccfg0_val, maccfg1_val;
-	unsigned long RealMediaMode;
-	int i;
-
-	/* Waiting 2 seconds for PHY link stable */
-	for (i = 0; i < 20000; i++) {
-		bmsr_val = ax88180_mdio_read (dev, MII_BMSR);
-		if (bmsr_val & BMSR_LSTATUS) {
-			break;
-		}
-		udelay(100);
-	}
-
-	bmsr_val = ax88180_mdio_read (dev, MII_BMSR);
-	debug ("ax88180: BMSR=0x%04x\n", (unsigned int)bmsr_val);
-
-	if (bmsr_val & BMSR_LSTATUS) {
-		bmcr_val = ax88180_mdio_read (dev, MII_BMCR);
-
-		if (bmcr_val & BMCR_ANENABLE) {
-
-			/*
-			 * Waiting for Auto-negotiation completion, this may
-			 * take up to 5 seconds.
-			 */
-			debug ("ax88180: Auto-negotiation is "
-			       "enabled. Waiting for NWay completion..\n");
-			for (i = 0; i < 50000; i++) {
-				bmsr_val = ax88180_mdio_read (dev, MII_BMSR);
-				if (bmsr_val & BMSR_ANEGCOMPLETE) {
-					break;
-				}
-				udelay(100);
-			}
-		} else
-			debug ("ax88180: Auto-negotiation is disabled.\n");
-
-		debug ("ax88180: BMCR=0x%04x, BMSR=0x%04x\n",
-		       (unsigned int)bmcr_val, (unsigned int)bmsr_val);
-
-		/* Get real media mode here */
-		switch (priv->PhyID0) {
-		case MARVELL_ALASKA_PHYSID0:
-			RealMediaMode = get_MarvellPHY_media_mode(dev);
-			break;
-		case CICADA_CIS8201_PHYSID0:
-			RealMediaMode = get_CicadaPHY_media_mode(dev);
-			break;
-		default:
-			RealMediaMode = MEDIA_1000FULL;
-			break;
-		}
-
-		priv->LinkState = INS_LINK_UP;
-
-		switch (RealMediaMode) {
-		case MEDIA_1000FULL:
-			debug ("ax88180: 1000Mbps Full-duplex mode.\n");
-			rxcfg_val = RXFLOW_ENABLE | DEFAULT_RXCFG;
-			maccfg0_val = TXFLOW_ENABLE | DEFAULT_MACCFG0;
-			maccfg1_val = GIGA_MODE_EN | RXFLOW_EN |
-			    FULLDUPLEX | DEFAULT_MACCFG1;
-			break;
-
-		case MEDIA_1000HALF:
-			debug ("ax88180: 1000Mbps Half-duplex mode.\n");
-			rxcfg_val = DEFAULT_RXCFG;
-			maccfg0_val = DEFAULT_MACCFG0;
-			maccfg1_val = GIGA_MODE_EN | DEFAULT_MACCFG1;
-			break;
-
-		case MEDIA_100FULL:
-			debug ("ax88180: 100Mbps Full-duplex mode.\n");
-			rxcfg_val = RXFLOW_ENABLE | DEFAULT_RXCFG;
-			maccfg0_val = SPEED100 | TXFLOW_ENABLE
-			    | DEFAULT_MACCFG0;
-			maccfg1_val = RXFLOW_EN | FULLDUPLEX | DEFAULT_MACCFG1;
-			break;
-
-		case MEDIA_100HALF:
-			debug ("ax88180: 100Mbps Half-duplex mode.\n");
-			rxcfg_val = DEFAULT_RXCFG;
-			maccfg0_val = SPEED100 | DEFAULT_MACCFG0;
-			maccfg1_val = DEFAULT_MACCFG1;
-			break;
-
-		case MEDIA_10FULL:
-			debug ("ax88180: 10Mbps Full-duplex mode.\n");
-			rxcfg_val = RXFLOW_ENABLE | DEFAULT_RXCFG;
-			maccfg0_val = TXFLOW_ENABLE | DEFAULT_MACCFG0;
-			maccfg1_val = RXFLOW_EN | FULLDUPLEX | DEFAULT_MACCFG1;
-			break;
-
-		case MEDIA_10HALF:
-			debug ("ax88180: 10Mbps Half-duplex mode.\n");
-			rxcfg_val = DEFAULT_RXCFG;
-			maccfg0_val = DEFAULT_MACCFG0;
-			maccfg1_val = DEFAULT_MACCFG1;
-			break;
-		default:
-			debug ("ax88180: Unknow media mode.\n");
-			rxcfg_val = DEFAULT_RXCFG;
-			maccfg0_val = DEFAULT_MACCFG0;
-			maccfg1_val = DEFAULT_MACCFG1;
-
-			priv->LinkState = INS_LINK_DOWN;
-			break;
-		}
-
-	} else {
-		rxcfg_val = DEFAULT_RXCFG;
-		maccfg0_val = DEFAULT_MACCFG0;
-		maccfg1_val = DEFAULT_MACCFG1;
-
-		priv->LinkState = INS_LINK_DOWN;
-	}
-
-	OUTW (dev, rxcfg_val, RXCFG);
-	OUTW (dev, maccfg0_val, MACCFG0);
-	OUTW (dev, maccfg1_val, MACCFG1);
-
-	return;
-}
-
-static unsigned long get_MarvellPHY_media_mode (struct eth_device *dev)
-{
-	unsigned long m88_ssr;
-	unsigned long MediaMode;
-
-	m88_ssr = ax88180_mdio_read (dev, M88_SSR);
-	switch (m88_ssr & SSR_MEDIA_MASK) {
-	case SSR_1000FULL:
-		MediaMode = MEDIA_1000FULL;
-		break;
-	case SSR_1000HALF:
-		MediaMode = MEDIA_1000HALF;
-		break;
-	case SSR_100FULL:
-		MediaMode = MEDIA_100FULL;
-		break;
-	case SSR_100HALF:
-		MediaMode = MEDIA_100HALF;
-		break;
-	case SSR_10FULL:
-		MediaMode = MEDIA_10FULL;
-		break;
-	case SSR_10HALF:
-		MediaMode = MEDIA_10HALF;
-		break;
-	default:
-		MediaMode = MEDIA_UNKNOWN;
-		break;
-	}
-
-	return MediaMode;
-}
-
-static unsigned long get_CicadaPHY_media_mode (struct eth_device *dev)
-{
-	unsigned long tmp_regval;
-	unsigned long MediaMode;
-
-	tmp_regval = ax88180_mdio_read (dev, CIS_AUX_CTRL_STATUS);
-	switch (tmp_regval & CIS_MEDIA_MASK) {
-	case CIS_1000FULL:
-		MediaMode = MEDIA_1000FULL;
-		break;
-	case CIS_1000HALF:
-		MediaMode = MEDIA_1000HALF;
-		break;
-	case CIS_100FULL:
-		MediaMode = MEDIA_100FULL;
-		break;
-	case CIS_100HALF:
-		MediaMode = MEDIA_100HALF;
-		break;
-	case CIS_10FULL:
-		MediaMode = MEDIA_10FULL;
-		break;
-	case CIS_10HALF:
-		MediaMode = MEDIA_10HALF;
-		break;
-	default:
-		MediaMode = MEDIA_UNKNOWN;
-		break;
-	}
-
-	return MediaMode;
-}
-
-static void ax88180_halt (struct eth_device *dev)
-{
-	/* Disable AX88180 TX/RX functions */
-	OUTW (dev, WAKEMOD, CMD);
-}
-
-static int ax88180_init (struct eth_device *dev, struct bd_info * bd)
-{
-	struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
-	unsigned short tmp_regval;
-
-	ax88180_mac_reset (dev);
-
-	/* Disable interrupt */
-	OUTW (dev, CLEAR_IMR, IMR);
-
-	/* Disable AX88180 TX/RX functions */
-	OUTW (dev, WAKEMOD, CMD);
-
-	/* Fill the MAC address */
-	tmp_regval =
-	    dev->enetaddr[0] | (((unsigned short)dev->enetaddr[1]) << 8);
-	OUTW (dev, tmp_regval, MACID0);
-
-	tmp_regval =
-	    dev->enetaddr[2] | (((unsigned short)dev->enetaddr[3]) << 8);
-	OUTW (dev, tmp_regval, MACID1);
-
-	tmp_regval =
-	    dev->enetaddr[4] | (((unsigned short)dev->enetaddr[5]) << 8);
-	OUTW (dev, tmp_regval, MACID2);
-
-	ax88180_media_config (dev);
-
-	OUTW (dev, DEFAULT_RXFILTER, RXFILTER);
-
-	/* Initial variables here */
-	priv->FirstTxDesc = TXDP0;
-	priv->NextTxDesc = TXDP0;
-
-	/* Check if there is any invalid interrupt status and clear it. */
-	OUTW (dev, INW (dev, ISR), ISR);
-
-	/* Start AX88180 TX/RX functions */
-	OUTW (dev, (RXEN | TXEN | WAKEMOD), CMD);
-
-	return 0;
-}
-
-/* Get a data block via Ethernet */
-static int ax88180_recv (struct eth_device *dev)
-{
-	unsigned short ISR_Status;
-	unsigned short tmp_regval;
-
-	/* Read and check interrupt status here. */
-	ISR_Status = INW (dev, ISR);
-
-	while (ISR_Status) {
-		/* Clear the interrupt status */
-		OUTW (dev, ISR_Status, ISR);
-
-		debug ("\nax88180: The interrupt status = 0x%04x\n",
-		       ISR_Status);
-
-		if (ISR_Status & ISR_PHY) {
-			/* Read ISR register once to clear PHY interrupt bit */
-			tmp_regval = ax88180_mdio_read (dev, M88_ISR);
-			ax88180_media_config (dev);
-		}
-
-		if ((ISR_Status & ISR_RX) || (ISR_Status & ISR_RXBUFFOVR)) {
-			ax88180_rx_handler (dev);
-		}
-
-		/* Read and check interrupt status again */
-		ISR_Status = INW (dev, ISR);
-	}
-
-	return 0;
-}
-
-/* Send a data block via Ethernet. */
-static int ax88180_send(struct eth_device *dev, void *packet, int length)
-{
-	struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
-	unsigned short TXDES_addr;
-	unsigned short txcmd_txdp, txbs_txdp;
-	unsigned short tmp_data;
-	int i;
-#if defined (CONFIG_DRIVER_AX88180_16BIT)
-	volatile unsigned short *txdata = (volatile unsigned short *)packet;
-#else
-	volatile unsigned long *txdata = (volatile unsigned long *)packet;
-#endif
-	unsigned short count;
-
-	if (priv->LinkState != INS_LINK_UP) {
-		return 0;
-	}
-
-	priv->FirstTxDesc = priv->NextTxDesc;
-	txbs_txdp = 1 << priv->FirstTxDesc;
-
-	debug ("ax88180: TXDP%d is available\n", priv->FirstTxDesc);
-
-	txcmd_txdp = priv->FirstTxDesc << 13;
-	TXDES_addr = TXDES0 + (priv->FirstTxDesc << 2);
-
-	OUTW (dev, (txcmd_txdp | length | TX_START_WRITE), TXCMD);
-
-	/* Comput access times */
-	count = (length + priv->PadSize) >> priv->BusWidth;
-
-	for (i = 0; i < count; i++) {
-		WRITE_TXBUF (dev, *(txdata + i));
-	}
-
-	OUTW (dev, txcmd_txdp | length, TXCMD);
-	OUTW (dev, txbs_txdp, TXBS);
-	OUTW (dev, (TXDPx_ENABLE | length), TXDES_addr);
-
-	priv->NextTxDesc = (priv->NextTxDesc + 1) & TXDP_MASK;
-
-	/*
-	 * Check the available transmit descriptor, if we had exhausted all
-	 * transmit descriptor ,then we have to wait for at least one free
-	 * descriptor
-	 */
-	txbs_txdp = 1 << priv->NextTxDesc;
-	tmp_data = INW (dev, TXBS);
-
-	if (tmp_data & txbs_txdp) {
-		if (ax88180_poll_tx_complete (dev) < 0) {
-			ax88180_mac_reset (dev);
-			priv->FirstTxDesc = TXDP0;
-			priv->NextTxDesc = TXDP0;
-			printf ("ax88180: Transmit time out occurred!\n");
-		}
-	}
-
-	return 0;
-}
-
-static void ax88180_read_mac_addr (struct eth_device *dev)
-{
-	unsigned short macid0_val, macid1_val, macid2_val;
-	unsigned short tmp_regval;
-	unsigned short i;
-
-	/* Reload MAC address from EEPROM */
-	OUTW (dev, RELOAD_EEPROM, PROMCTRL);
-
-	/* Waiting for reload eeprom completion */
-	for (i = 0; i < 500; i++) {
-		tmp_regval = INW (dev, PROMCTRL);
-		if ((tmp_regval & RELOAD_EEPROM) == 0)
-			break;
-		udelay(1000);
-	}
-
-	/* Get MAC addresses */
-	macid0_val = INW (dev, MACID0);
-	macid1_val = INW (dev, MACID1);
-	macid2_val = INW (dev, MACID2);
-
-	if (((macid0_val | macid1_val | macid2_val) != 0) &&
-	    ((macid0_val & 0x01) == 0)) {
-		dev->enetaddr[0] = (unsigned char)macid0_val;
-		dev->enetaddr[1] = (unsigned char)(macid0_val >> 8);
-		dev->enetaddr[2] = (unsigned char)macid1_val;
-		dev->enetaddr[3] = (unsigned char)(macid1_val >> 8);
-		dev->enetaddr[4] = (unsigned char)macid2_val;
-		dev->enetaddr[5] = (unsigned char)(macid2_val >> 8);
-	}
-}
-
-/* Exported SubProgram Bodies */
-int ax88180_initialize (struct bd_info * bis)
-{
-	struct eth_device *dev;
-	struct ax88180_private *priv;
-
-	dev = (struct eth_device *)malloc (sizeof *dev);
-
-	if (NULL == dev)
-		return 0;
-
-	memset (dev, 0, sizeof *dev);
-
-	priv = (struct ax88180_private *)malloc (sizeof (*priv));
-
-	if (NULL == priv)
-		return 0;
-
-	memset (priv, 0, sizeof *priv);
-
-	strcpy(dev->name, "ax88180");
-	dev->iobase = AX88180_BASE;
-	dev->priv = priv;
-	dev->init = ax88180_init;
-	dev->halt = ax88180_halt;
-	dev->send = ax88180_send;
-	dev->recv = ax88180_recv;
-
-	priv->BusWidth = BUS_WIDTH_32;
-	priv->PadSize = 3;
-#if defined (CONFIG_DRIVER_AX88180_16BIT)
-	OUTW (dev, (START_BASE >> 8), BASE);
-	OUTW (dev, DECODE_EN, DECODE);
-
-	priv->BusWidth = BUS_WIDTH_16;
-	priv->PadSize = 1;
-#endif
-
-	ax88180_mac_reset (dev);
-
-	/* Disable interrupt */
-	OUTW (dev, CLEAR_IMR, IMR);
-
-	/* Disable AX88180 TX/RX functions */
-	OUTW (dev, WAKEMOD, CMD);
-
-	ax88180_read_mac_addr (dev);
-
-	eth_register (dev);
-
-	return ax88180_phy_initial (dev);
-
-}
diff --git a/drivers/net/ax88180.h b/drivers/net/ax88180.h
deleted file mode 100644
index daf18e0157..0000000000
--- a/drivers/net/ax88180.h
+++ /dev/null
@@ -1,396 +0,0 @@
-/* ax88180.h: ASIX AX88180 Non-PCI Gigabit Ethernet u-boot driver */
-/*
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- */
-
-#ifndef _AX88180_H_
-#define _AX88180_H_
-
-#include <asm/io.h>
-#include <asm/types.h>
-#include <config.h>
-
-typedef enum _ax88180_link_state {
-	INS_LINK_DOWN,
-	INS_LINK_UP,
-	INS_LINK_UNKNOWN
-} ax88180_link_state;
-
-struct ax88180_private {
-	unsigned char BusWidth;
-	unsigned char PadSize;
-	unsigned short PhyAddr;
-	unsigned short PhyID0;
-	unsigned short PhyID1;
-	unsigned short FirstTxDesc;
-	unsigned short NextTxDesc;
-	ax88180_link_state LinkState;
-};
-
-#define BUS_WIDTH_16			1
-#define BUS_WIDTH_32			2
-
-#define ENABLE_JUMBO			1
-#define DISABLE_JUMBO			0
-
-#define ENABLE_BURST			1
-#define DISABLE_BURST			0
-
-#define NORMAL_RX_MODE		0
-#define RX_LOOPBACK_MODE		1
-#define RX_INIFINIT_LOOP_MODE		2
-#define TX_INIFINIT_LOOP_MODE		3
-
-#define DEFAULT_ETH_MTU		1500
-
-/* Jumbo packet size 4086 bytes included 4 bytes CRC*/
-#define MAX_JUMBO_MTU		4072
-
-/* Max Tx Jumbo size 4086 bytes included 4 bytes CRC */
-#define MAX_TX_JUMBO_SIZE		4086
-
-/* Max Rx Jumbo size is 15K Bytes */
-#define MAX_RX_SIZE			0x3C00
-
-#define MARVELL_ALASKA_PHYSID0	0x141
-#define MARVELL_88E1118_PHYSID1	0xE40
-
-#define CICADA_CIS8201_PHYSID0		0x000F
-
-#define MEDIA_AUTO			0
-#define MEDIA_1000FULL			1
-#define MEDIA_1000HALF			2
-#define MEDIA_100FULL			3
-#define MEDIA_100HALF			4
-#define MEDIA_10FULL			5
-#define MEDIA_10HALF			6
-#define MEDIA_UNKNOWN		7
-
-#define AUTO_MEDIA			0
-#define FORCE_MEDIA			1
-
-#define TXDP_MASK			3
-#define TXDP0				0
-#define TXDP1				1
-#define TXDP2				2
-#define TXDP3				3
-
-#define CMD_MAP_SIZE			0x100
-
-#if defined (CONFIG_DRIVER_AX88180_16BIT)
-  #define AX88180_MEMORY_SIZE		0x00004000
-  #define START_BASE			0x1000
-
-  #define RX_BUF_SIZE			0x1000
-  #define TX_BUF_SIZE			0x0F00
-
-  #define TX_BASE			START_BASE
-  #define CMD_BASE			(TX_BASE + TX_BUF_SIZE)
-  #define RX_BASE			(CMD_BASE + CMD_MAP_SIZE)
-#else
-  #define AX88180_MEMORY_SIZE	0x00010000
-
-  #define RX_BUF_SIZE			0x8000
-  #define TX_BUF_SIZE			0x7C00
-
-  #define RX_BASE			0x0000
-  #define TX_BASE			(RX_BASE + RX_BUF_SIZE)
-  #define CMD_BASE			(TX_BASE + TX_BUF_SIZE)
-#endif
-
-/* AX88180 Memory Mapping Definition */
-#define RXBUFFER_START			RX_BASE
-  #define RX_PACKET_LEN_OFFSET	0
-  #define RX_PAGE_NUM_MASK		0x7FF	/* RX pages 0~7FFh */
-#define TXBUFFER_START			TX_BASE
-
-/* AX88180 MAC Register Definition */
-#define DECODE		(0)
-  #define DECODE_EN		0x00000001
-#define BASE		(6)
-#define CMD		(CMD_BASE + 0x0000)
-  #define WAKEMOD		0x00000001
-  #define TXEN			0x00000100
-  #define RXEN			0x00000200
-  #define DEFAULT_CMD		WAKEMOD
-#define IMR		(CMD_BASE + 0x0004)
-  #define IMR_RXBUFFOVR	0x00000001
-  #define IMR_WATCHDOG	0x00000002
-  #define IMR_TX		0x00000008
-  #define IMR_RX		0x00000010
-  #define IMR_PHY		0x00000020
-  #define CLEAR_IMR		0x00000000
-  #define DEFAULT_IMR		(IMR_PHY | IMR_RX | IMR_TX |\
-					 IMR_RXBUFFOVR | IMR_WATCHDOG)
-#define ISR		(CMD_BASE + 0x0008)
-  #define ISR_RXBUFFOVR	0x00000001
-  #define ISR_WATCHDOG	0x00000002
-  #define ISR_TX			0x00000008
-  #define ISR_RX			0x00000010
-  #define ISR_PHY		0x00000020
-#define TXCFG		(CMD_BASE + 0x0010)
-  #define AUTOPAD_CRC		0x00000050
-  #define DEFAULT_TXCFG	AUTOPAD_CRC
-#define TXCMD		(CMD_BASE + 0x0014)
-  #define TXCMD_TXDP_MASK	0x00006000
-  #define TXCMD_TXDP0		0x00000000
-  #define TXCMD_TXDP1		0x00002000
-  #define TXCMD_TXDP2		0x00004000
-  #define TXCMD_TXDP3		0x00006000
-  #define TX_START_WRITE	0x00008000
-  #define TX_STOP_WRITE		0x00000000
-  #define DEFAULT_TXCMD	0x00000000
-#define TXBS		(CMD_BASE + 0x0018)
-  #define TXDP0_USED		0x00000001
-  #define TXDP1_USED		0x00000002
-  #define TXDP2_USED		0x00000004
-  #define TXDP3_USED		0x00000008
-  #define DEFAULT_TXBS		0x00000000
-#define TXDES0		(CMD_BASE + 0x0020)
-  #define TXDPx_ENABLE		0x00008000
-  #define TXDPx_LEN_MASK	0x00001FFF
-  #define DEFAULT_TXDES0	0x00000000
-#define TXDES1		(CMD_BASE + 0x0024)
-  #define TXDPx_ENABLE		0x00008000
-  #define TXDPx_LEN_MASK	0x00001FFF
-  #define DEFAULT_TXDES1	0x00000000
-#define TXDES2		(CMD_BASE + 0x0028)
-  #define TXDPx_ENABLE		0x00008000
-  #define TXDPx_LEN_MASK	0x00001FFF
-  #define DEFAULT_TXDES2	0x00000000
-#define TXDES3		(CMD_BASE + 0x002C)
-  #define TXDPx_ENABLE		0x00008000
-  #define TXDPx_LEN_MASK	0x00001FFF
-  #define DEFAULT_TXDES3	0x00000000
-#define RXCFG		(CMD_BASE + 0x0030)
-  #define RXBUFF_PROTECT	0x00000001
-  #define RXTCPCRC_CHECK	0x00000010
-  #define RXFLOW_ENABLE	0x00000100
-  #define DEFAULT_RXCFG	RXBUFF_PROTECT
-#define RXCURT		(CMD_BASE + 0x0034)
-  #define DEFAULT_RXCURT	0x00000000
-#define RXBOUND	(CMD_BASE + 0x0038)
-  #define DEFAULT_RXBOUND	0x7FF		/* RX pages 0~7FFh */
-#define MACCFG0	(CMD_BASE + 0x0040)
-  #define MACCFG0_BIT3_0	0x00000007
-  #define IPGT_VAL		0x00000150
-  #define TXFLOW_ENABLE	0x00001000
-  #define SPEED100		0x00008000
-  #define DEFAULT_MACCFG0	(IPGT_VAL | MACCFG0_BIT3_0)
-#define MACCFG1	(CMD_BASE + 0x0044)
-  #define RGMII_EN		0x00000002
-  #define RXFLOW_EN		0x00000020
-  #define FULLDUPLEX		0x00000040
-  #define MAX_JUMBO_LEN	0x00000780
-  #define RXJUMBO_EN		0x00000800
-  #define GIGA_MODE_EN	0x00001000
-  #define RXCRC_CHECK		0x00002000
-  #define RXPAUSE_DA_CHECK	0x00004000
-
-  #define JUMBO_LEN_4K		0x00000200
-  #define JUMBO_LEN_15K	0x00000780
-  #define DEFAULT_MACCFG1	(RXCRC_CHECK | RXPAUSE_DA_CHECK | \
-				 RGMII_EN)
-  #define CICADA_DEFAULT_MACCFG1	(RXCRC_CHECK | RXPAUSE_DA_CHECK)
-#define MACCFG2		(CMD_BASE + 0x0048)
-  #define MACCFG2_BIT15_8	0x00000100
-  #define JAM_LIMIT_MASK	0x000000FC
-  #define DEFAULT_JAM_LIMIT	0x00000064
-  #define DEFAULT_MACCFG2	MACCFG2_BIT15_8
-#define MACCFG3		(CMD_BASE + 0x004C)
-  #define IPGR2_VAL		0x0000000E
-  #define IPGR1_VAL		0x00000600
-  #define NOABORT		0x00008000
-  #define DEFAULT_MACCFG3	(IPGR1_VAL | IPGR2_VAL)
-#define TXPAUT		(CMD_BASE + 0x0054)
-  #define DEFAULT_TXPAUT	0x001FE000
-#define RXBTHD0		(CMD_BASE + 0x0058)
-  #define DEFAULT_RXBTHD0	0x00000300
-#define RXBTHD1		(CMD_BASE + 0x005C)
-  #define DEFAULT_RXBTHD1	0x00000600
-#define RXFULTHD	(CMD_BASE + 0x0060)
-  #define DEFAULT_RXFULTHD	0x00000100
-#define MISC		(CMD_BASE + 0x0068)
-  /* Normal operation mode */
-  #define MISC_NORMAL		0x00000003
-  /* Clear bit 0 to reset MAC */
-  #define MISC_RESET_MAC	0x00000002
-  /* Clear bit 1 to reset PHY */
-  #define MISC_RESET_PHY	0x00000001
-  /* Clear bit 0 and 1 to reset MAC and PHY */
-  #define MISC_RESET_MAC_PHY	0x00000000
-  #define DEFAULT_MISC		MISC_NORMAL
-#define MACID0		(CMD_BASE + 0x0070)
-#define MACID1		(CMD_BASE + 0x0074)
-#define MACID2		(CMD_BASE + 0x0078)
-#define TXLEN		(CMD_BASE + 0x007C)
-  #define DEFAULT_TXLEN	0x000005FC
-#define RXFILTER	(CMD_BASE + 0x0080)
-  #define RX_RXANY		0x00000001
-  #define RX_MULTICAST		0x00000002
-  #define RX_UNICAST		0x00000004
-  #define RX_BROADCAST	0x00000008
-  #define RX_MULTI_HASH	0x00000010
-  #define DISABLE_RXFILTER	0x00000000
-  #define DEFAULT_RXFILTER	(RX_BROADCAST + RX_UNICAST)
-#define MDIOCTRL	(CMD_BASE + 0x0084)
-  #define PHY_ADDR_MASK	0x0000001F
-  #define REG_ADDR_MASK	0x00001F00
-  #define READ_PHY		0x00004000
-  #define WRITE_PHY		0x00008000
-#define MDIODP		(CMD_BASE + 0x0088)
-#define GPIOCTRL	(CMD_BASE + 0x008C)
-#define RXINDICATOR	(CMD_BASE + 0x0090)
-  #define RX_START_READ	0x00000001
-  #define RX_STOP_READ		0x00000000
-  #define DEFAULT_RXINDICATOR	RX_STOP_READ
-#define TXST		(CMD_BASE + 0x0094)
-#define MDCCLKPAT	(CMD_BASE + 0x00A0)
-#define RXIPCRCCNT	(CMD_BASE + 0x00A4)
-#define RXCRCCNT	(CMD_BASE + 0x00A8)
-#define TXFAILCNT	(CMD_BASE + 0x00AC)
-#define PROMDP		(CMD_BASE + 0x00B0)
-#define PROMCTRL	(CMD_BASE + 0x00B4)
-  #define RELOAD_EEPROM	0x00000200
-#define MAXRXLEN	(CMD_BASE + 0x00B8)
-#define HASHTAB0	(CMD_BASE + 0x00C0)
-#define HASHTAB1	(CMD_BASE + 0x00C4)
-#define HASHTAB2	(CMD_BASE + 0x00C8)
-#define HASHTAB3	(CMD_BASE + 0x00CC)
-#define DOGTHD0	(CMD_BASE + 0x00E0)
-  #define DEFAULT_DOGTHD0	0x0000FFFF
-#define DOGTHD1	(CMD_BASE + 0x00E4)
-  #define START_WATCHDOG_TIMER	0x00008000
-  #define DEFAULT_DOGTHD1		0x00000FFF
-#define SOFTRST		(CMD_BASE + 0x00EC)
-  #define SOFTRST_NORMAL	0x00000003
-  #define SOFTRST_RESET_MAC	0x00000002
-
-/* Marvell 88E1111 Gigabit PHY Register Definition */
-#define M88_SSR		0x0011
-  #define SSR_SPEED_MASK	0xC000
-  #define SSR_SPEED_1000		0x8000
-  #define SSR_SPEED_100		0x4000
-  #define SSR_SPEED_10		0x0000
-  #define SSR_DUPLEX		0x2000
-  #define SSR_MEDIA_RESOLVED_OK	0x0800
-
-  #define SSR_MEDIA_MASK	(SSR_SPEED_MASK | SSR_DUPLEX)
-  #define SSR_1000FULL		(SSR_SPEED_1000 | SSR_DUPLEX)
-  #define SSR_1000HALF		SSR_SPEED_1000
-  #define SSR_100FULL		(SSR_SPEED_100 | SSR_DUPLEX)
-  #define SSR_100HALF		SSR_SPEED_100
-  #define SSR_10FULL		(SSR_SPEED_10 | SSR_DUPLEX)
-  #define SSR_10HALF		SSR_SPEED_10
-#define M88_IER		0x0012
-  #define LINK_CHANGE_INT	0x0400
-#define M88_ISR		0x0013
-  #define LINK_CHANGE_STATUS	0x0400
-#define M88E1111_EXT_SCR	0x0014
-  #define RGMII_RXCLK_DELAY	0x0080
-  #define RGMII_TXCLK_DELAY	0x0002
-  #define DEFAULT_EXT_SCR	(RGMII_TXCLK_DELAY | RGMII_RXCLK_DELAY)
-#define M88E1111_EXT_SSR	0x001B
-  #define HWCFG_MODE_MASK	0x000F
-  #define RGMII_COPPER_MODE	0x000B
-
-/* Marvell 88E1118 Gigabit PHY Register Definition */
-#define M88E1118_CR			0x14
-  #define M88E1118_CR_RGMII_RXCLK_DELAY	0x0020
-  #define M88E1118_CR_RGMII_TXCLK_DELAY	0x0010
-  #define M88E1118_CR_DEFAULT		(M88E1118_CR_RGMII_TXCLK_DELAY | \
-					 M88E1118_CR_RGMII_RXCLK_DELAY)
-#define M88E1118_LEDCTL		0x10		/* Reg 16 on page 3 */
-  #define M88E1118_LEDCTL_LED2INT			0x200
-  #define M88E1118_LEDCTL_LED2BLNK			0x400
-  #define M88E1118_LEDCTL_LED0DUALMODE1	0xc
-  #define M88E1118_LEDCTL_LED0DUALMODE2	0xd
-  #define M88E1118_LEDCTL_LED0DUALMODE3	0xe
-  #define M88E1118_LEDCTL_LED0DUALMODE4	0xf
-  #define M88E1118_LEDCTL_DEFAULT	(M88E1118_LEDCTL_LED2BLNK | \
-					 M88E1118_LEDCTL_LED0DUALMODE4)
-
-#define M88E1118_LEDMIX		0x11		/* Reg 17 on page 3 */
-  #define M88E1118_LEDMIX_LED050				0x4
-  #define M88E1118_LEDMIX_LED150				0x8
-
-#define M88E1118_PAGE_SEL	0x16		/* Reg page select */
-
-/* CICADA CIS8201 Gigabit PHY Register Definition */
-#define CIS_IMR		0x0019
-  #define CIS_INT_ENABLE	0x8000
-  #define CIS_LINK_CHANGE_INT	0x2000
-#define CIS_ISR		0x001A
-  #define CIS_INT_PENDING	0x8000
-  #define CIS_LINK_CHANGE_STATUS	0x2000
-#define CIS_AUX_CTRL_STATUS	0x001C
-  #define CIS_AUTONEG_COMPLETE	0x8000
-  #define CIS_SPEED_MASK	0x0018
-  #define CIS_SPEED_1000		0x0010
-  #define CIS_SPEED_100		0x0008
-  #define CIS_SPEED_10		0x0000
-  #define CIS_DUPLEX		0x0020
-
-  #define CIS_MEDIA_MASK	(CIS_SPEED_MASK | CIS_DUPLEX)
-  #define CIS_1000FULL		(CIS_SPEED_1000 | CIS_DUPLEX)
-  #define CIS_1000HALF		CIS_SPEED_1000
-  #define CIS_100FULL		(CIS_SPEED_100 | CIS_DUPLEX)
-  #define CIS_100HALF		CIS_SPEED_100
-  #define CIS_10FULL		(CIS_SPEED_10 | CIS_DUPLEX)
-  #define CIS_10HALF		CIS_SPEED_10
-  #define CIS_SMI_PRIORITY	0x0004
-
-static inline unsigned short INW (struct eth_device *dev, unsigned long addr)
-{
-	return le16_to_cpu(readw(addr + (void *)dev->iobase));
-}
-
-/*
- Access RXBUFFER_START/TXBUFFER_START to read RX buffer/write TX buffer
-*/
-#if defined (CONFIG_DRIVER_AX88180_16BIT)
-static inline void OUTW (struct eth_device *dev, unsigned short command, unsigned long addr)
-{
-	writew(cpu_to_le16(command), addr + (void *)dev->iobase);
-}
-
-static inline unsigned short READ_RXBUF (struct eth_device *dev)
-{
-	return le16_to_cpu(readw(RXBUFFER_START + (void *)dev->iobase));
-}
-
-static inline void WRITE_TXBUF (struct eth_device *dev, unsigned short data)
-{
-	writew(cpu_to_le16(data), TXBUFFER_START + (void *)dev->iobase);
-}
-#else
-static inline void OUTW (struct eth_device *dev, unsigned short command, unsigned long addr)
-{
-	writel(cpu_to_le32(command), addr + (void *)dev->iobase);
-}
-
-static inline unsigned long READ_RXBUF (struct eth_device *dev)
-{
-	return le32_to_cpu(readl(RXBUFFER_START + (void *)dev->iobase));
-}
-
-static inline void WRITE_TXBUF (struct eth_device *dev, unsigned long data)
-{
-	writel(cpu_to_le32(data), TXBUFFER_START + (void *)dev->iobase);
-}
-#endif
-
-#endif /* _AX88180_H_ */