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authorRayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>2020-04-06 13:29:52 +0530
committerStefan Roese <sr@denx.de>2020-04-15 08:54:07 +0200
commit19a159f94ac1532ec12cf14a96c9daf172ade988 (patch)
treed8359bfc34d7c2425b89dfa8cf7f8ed32b7be2c9 /drivers/watchdog
parent40d7f3c8d111d4e4b6c1df105d5a4cedf5b7d6c1 (diff)
watchdog: sp805_wdt: get platform clock from dt file
Get the watchdog platform clock from the DTS file using clk subsystem and use the same for calculating ticks in msec. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/watchdog')
-rw-r--r--drivers/watchdog/sp805_wdt.c15
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c
index ca3ccbe76c..65fd2384f1 100644
--- a/drivers/watchdog/sp805_wdt.c
+++ b/drivers/watchdog/sp805_wdt.c
@@ -7,6 +7,7 @@
#include <asm/io.h>
#include <common.h>
+#include <clk.h>
#include <dm/device.h>
#include <dm/fdtaddr.h>
#include <dm/read.h>
@@ -34,6 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
struct sp805_wdt_priv {
void __iomem *reg;
+ unsigned long clk_rate;
};
static int sp805_wdt_reset(struct udevice *dev)
@@ -63,8 +65,13 @@ static int sp805_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
* set 120s, the gd->bus_clk is less than 1145MHz, the load_value will
* not overflow.
*/
- load_value = (gd->bus_clk) /
- (2 * 1000 * SYS_FSL_WDT_CLK_DIV) * load_time;
+ if (gd->bus_clk) {
+ load_value = (gd->bus_clk) /
+ (2 * 1000 * SYS_FSL_WDT_CLK_DIV) * load_time;
+ } else {
+ /* platform provide clk */
+ load_value = (timeout / 2) * (priv->clk_rate / 1000);
+ }
writel(UNLOCK, priv->reg + WDTLOCK);
writel(load_value, priv->reg + WDTLOAD);
@@ -105,11 +112,15 @@ static int sp805_wdt_probe(struct udevice *dev)
static int sp805_wdt_ofdata_to_platdata(struct udevice *dev)
{
struct sp805_wdt_priv *priv = dev_get_priv(dev);
+ struct clk clk;
priv->reg = (void __iomem *)dev_read_addr(dev);
if (IS_ERR(priv->reg))
return PTR_ERR(priv->reg);
+ if (!clk_get_by_index(dev, 0, &clk))
+ priv->clk_rate = clk_get_rate(&clk);
+
return 0;
}