diff options
| author | Siarhei Siamashka <siarhei.siamashka@gmail.com> | 2015-01-19 05:23:35 +0200 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2015-01-22 12:34:56 +0100 |
| commit | dddccd6913142e0ba63ce6e529c38651c2ab0197 (patch) | |
| tree | e1819e3251f887c0e2724be99b82f75512706ece /drivers/video/Kconfig | |
| parent | aaa6ac5eab8df95a3b9646194d90f49e79476258 (diff) | |
video: ssd2828: Allow using 'pclk' as the PLL clock source
Instead of using the internal 'tx_clk' clock source, it is also
possible to use the pixel clock signal from the parallel LCD
interface ('pclk') as the reference clock for PLL.
The 'tx_clk' clock speed may be different on different boards/devices
(the allowed range is 8MHz - 30MHz). Which is not very convenient,
especially considering the need to know the exact 'tx_clk' clock
speed. This clock speed may be difficult to identify without having
device schematics and/or accurate documentation/sources every time.
Using 'pclk' is free from all these problems.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'drivers/video/Kconfig')
| -rw-r--r-- | drivers/video/Kconfig | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index ec14a371dc..d9d4afcba6 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -19,12 +19,14 @@ config VIDEO_LCD_SSD2828 config VIDEO_LCD_SSD2828_TX_CLK int "SSD2828 TX_CLK frequency (in MHz)" depends on VIDEO_LCD_SSD2828 + default 0 ---help--- The frequency of the crystal, which is clocking SSD2828. It may be anything in the 8MHz-30MHz range and the exact value should be retrieved from the board schematics. Or in the case of Allwinner hardware, it can be usually found as 'lcd_xtal_freq' variable in - FEX files. + FEX files. It can be also set to 0 for selecting PCLK from the + parallel LCD interface instead of TX_CLK as the PLL clock source. config VIDEO_LCD_SSD2828_RESET string "RESET pin of SSD2828" |