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authorTom Rini <trini@konsulko.com>2017-03-14 11:08:10 -0400
committerTom Rini <trini@konsulko.com>2017-04-05 13:52:01 -0400
commitea3310e8aafad1da72d9a5e60568d725cbdefdbd (patch)
tree869faa824f09ce4d40f2ce503a607ceb28b5ce91 /drivers/usb/musb
parentc3b7cfe15ec1db047182d4ec55a3ce05f19bdf38 (diff)
Blackfin: Remove
The architecture is currently unmaintained, remove. Cc: Benjamin Matthews <mben12@gmail.com> Cc: Chong Huang <chuang@ucrobotics.com> Cc: Dimitar Penev <dpn@switchfin.org> Cc: Haitao Zhang <hzhang@ucrobotics.com> Cc: I-SYST Micromodule <support@i-syst.com> Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de> Cc: Marek Vasut <marex@denx.de> Cc: Martin Strubel <strubel@section5.ch> Cc: Peter Meerwald <devel@bct-electronic.com> Cc: Sonic Zhang <sonic.adi@gmail.com> Cc: Valentin Yakovenkov <yakovenkov@niistt.ru> Cc: Wojtek Skulski <info@skutek.com> Cc: Wojtek Skulski <skulski@pas.rochester.edu> Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers/usb/musb')
-rw-r--r--drivers/usb/musb/Makefile1
-rw-r--r--drivers/usb/musb/blackfin_usb.c172
-rw-r--r--drivers/usb/musb/blackfin_usb.h99
-rw-r--r--drivers/usb/musb/musb_core.h27
-rw-r--r--drivers/usb/musb/musb_hcd.c5
5 files changed, 0 insertions, 304 deletions
diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile
index bd2b7c521f..9554eddb29 100644
--- a/drivers/usb/musb/Makefile
+++ b/drivers/usb/musb/Makefile
@@ -7,7 +7,6 @@
obj-$(CONFIG_USB_MUSB_HCD) += musb_hcd.o musb_core.o
obj-$(CONFIG_USB_MUSB_UDC) += musb_udc.o musb_core.o
-obj-$(CONFIG_USB_BLACKFIN) += blackfin_usb.o
obj-$(CONFIG_USB_DAVINCI) += davinci.o
obj-$(CONFIG_USB_OMAP3) += omap3.o
obj-$(CONFIG_USB_DA8XX) += da8xx.o
diff --git a/drivers/usb/musb/blackfin_usb.c b/drivers/usb/musb/blackfin_usb.c
deleted file mode 100644
index 65fff887d3..0000000000
--- a/drivers/usb/musb/blackfin_usb.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * Blackfin MUSB HCD (Host Controller Driver) for u-boot
- *
- * Copyright (c) 2008-2009 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-
-#include <usb.h>
-
-#include <asm/blackfin.h>
-#include <asm/clock.h>
-#include <asm/mach-common/bits/usb.h>
-
-#include "musb_core.h"
-
-#ifndef CONFIG_USB_BLACKFIN_CLKIN
-#define CONFIG_USB_BLACKFIN_CLKIN 24
-#endif
-
-/* MUSB platform configuration */
-struct musb_config musb_cfg = {
- .regs = (struct musb_regs *)USB_FADDR,
- .timeout = 0x3FFFFFF,
- .musb_speed = 0,
-};
-
-/*
- * This function read or write data to endpoint fifo
- * Blackfin use DMA polling method to avoid buffer alignment issues
- *
- * ep - Endpoint number
- * length - Number of bytes to write to FIFO
- * fifo_data - Pointer to data buffer to be read/write
- * is_write - Flag for read or write
- */
-void rw_fifo(u8 ep, u32 length, void *fifo_data, int is_write)
-{
- struct bfin_musb_dma_regs *regs;
- u32 val = (u32)fifo_data;
-
- blackfin_dcache_flush_invalidate_range(fifo_data, fifo_data + length);
-
- regs = (void *)USB_DMA_INTERRUPT;
- regs += ep;
-
- /* Setup DMA address register */
- bfin_write16(&regs->addr_low, val);
- SSYNC();
-
- bfin_write16(&regs->addr_high, val >> 16);
- SSYNC();
-
- /* Setup DMA count register */
- bfin_write16(&regs->count_low, length);
- bfin_write16(&regs->count_high, 0);
- SSYNC();
-
- /* Enable the DMA */
- val = (ep << 4) | DMA_ENA | INT_ENA;
- if (is_write)
- val |= DIRECTION;
- bfin_write16(&regs->control, val);
- SSYNC();
-
- /* Wait for compelete */
- while (!(bfin_read_USB_DMA_INTERRUPT() & (1 << ep)))
- continue;
-
- /* acknowledge dma interrupt */
- bfin_write_USB_DMA_INTERRUPT(1 << ep);
- SSYNC();
-
- /* Reset DMA */
- bfin_write16(&regs->control, 0);
- SSYNC();
-}
-
-void write_fifo(u8 ep, u32 length, void *fifo_data)
-{
- rw_fifo(ep, length, fifo_data, 1);
-}
-
-void read_fifo(u8 ep, u32 length, void *fifo_data)
-{
- rw_fifo(ep, length, fifo_data, 0);
-}
-
-
-/*
- * CPU and board-specific MUSB initializations. Aliased function
- * signals caller to move on.
- */
-static void __def_musb_init(void)
-{
-}
-void board_musb_init(void) __attribute__((weak, alias("__def_musb_init")));
-
-static void bfin_anomaly_init(void)
-{
- u32 revid;
-
- if (!ANOMALY_05000346 && !ANOMALY_05000347)
- return;
-
- revid = bfin_revid();
-
-#ifdef __ADSPBF54x__
- if (revid > 0)
- return;
-#endif
-#ifdef __ADSPBF52x__
- if (ANOMALY_BF526 && revid > 0)
- return;
- if (ANOMALY_BF527 && revid > 1)
- return;
-#endif
-
- if (ANOMALY_05000346) {
- bfin_write_USB_APHY_CALIB(ANOMALY_05000346_value);
- SSYNC();
- }
-
- if (ANOMALY_05000347) {
- bfin_write_USB_APHY_CNTRL(0x0);
- SSYNC();
- }
-}
-
-int musb_platform_init(void)
-{
- /* board specific initialization */
- board_musb_init();
-
- bfin_anomaly_init();
-
- /* Configure PLL oscillator register */
- bfin_write_USB_PLLOSC_CTRL(0x3080 |
- ((480 / CONFIG_USB_BLACKFIN_CLKIN) << 1));
- SSYNC();
-
- bfin_write_USB_SRP_CLKDIV((get_sclk()/1000) / 32 - 1);
- SSYNC();
-
- bfin_write_USB_EP_NI0_RXMAXP(64);
- SSYNC();
-
- bfin_write_USB_EP_NI0_TXMAXP(64);
- SSYNC();
-
- /* Route INTRUSB/INTR_RX/INTR_TX to USB_INT0*/
- bfin_write_USB_GLOBINTR(0x7);
- SSYNC();
-
- bfin_write_USB_GLOBAL_CTL(GLOBAL_ENA | EP1_TX_ENA | EP2_TX_ENA |
- EP3_TX_ENA | EP4_TX_ENA | EP5_TX_ENA |
- EP6_TX_ENA | EP7_TX_ENA | EP1_RX_ENA |
- EP2_RX_ENA | EP3_RX_ENA | EP4_RX_ENA |
- EP5_RX_ENA | EP6_RX_ENA | EP7_RX_ENA);
- SSYNC();
-
- return 0;
-}
-
-/*
- * This function performs Blackfin platform specific deinitialization for usb.
-*/
-void musb_platform_deinit(void)
-{
-}
diff --git a/drivers/usb/musb/blackfin_usb.h b/drivers/usb/musb/blackfin_usb.h
deleted file mode 100644
index de994bf336..0000000000
--- a/drivers/usb/musb/blackfin_usb.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Blackfin MUSB HCD (Host Controller Driver) for u-boot
- *
- * Copyright (c) 2008-2009 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#ifndef __BLACKFIN_USB_H__
-#define __BLACKFIN_USB_H__
-
-#include <linux/types.h>
-
-/* Every register is 32bit aligned, but only 16bits in size */
-#define ureg(name) u16 name; u16 __pad_##name;
-
-#define musb_regs musb_regs
-struct musb_regs {
- /* common registers */
- ureg(faddr)
- ureg(power)
- ureg(intrtx)
- ureg(intrrx)
- ureg(intrtxe)
- ureg(intrrxe)
- ureg(intrusb)
- ureg(intrusbe)
- ureg(frame)
- ureg(index)
- ureg(testmode)
- ureg(globintr)
- ureg(global_ctl)
- u32 reserved0[3];
- /* indexed registers */
- ureg(txmaxp)
- ureg(txcsr)
- ureg(rxmaxp)
- ureg(rxcsr)
- ureg(rxcount)
- ureg(txtype)
- ureg(txinterval)
- ureg(rxtype)
- ureg(rxinterval)
- u32 reserved1;
- ureg(txcount)
- u32 reserved2[5];
- /* fifo */
- u16 fifox[32];
- /* OTG, dynamic FIFO, version & vendor registers */
- u32 reserved3[16];
- ureg(devctl)
- ureg(vbus_irq)
- ureg(vbus_mask)
- u32 reserved4[15];
- ureg(linkinfo)
- ureg(vplen)
- ureg(hseof1)
- ureg(fseof1)
- ureg(lseof1)
- u32 reserved5[41];
- /* target address registers */
- struct musb_tar_regs {
- ureg(txmaxp)
- ureg(txcsr)
- ureg(rxmaxp)
- ureg(rxcsr)
- ureg(rxcount)
- ureg(txtype)
- ureg(txinternal)
- ureg(rxtype)
- ureg(rxinternal)
- u32 reserved6;
- ureg(txcount)
- u32 reserved7[5];
- } tar[8];
-} __attribute__((packed));
-
-struct bfin_musb_dma_regs {
- ureg(interrupt);
- ureg(control);
- ureg(addr_low);
- ureg(addr_high);
- ureg(count_low);
- ureg(count_high);
- u32 reserved0[2];
-};
-
-#undef ureg
-
-/* EP5-EP7 are the only ones with 1024 byte FIFOs which BULK really needs */
-#define MUSB_BULK_EP 5
-
-/* Blackfin FIFO's are static */
-#define MUSB_NO_DYNAMIC_FIFO
-
-/* No HUB support :( */
-#define MUSB_NO_MULTIPOINT
-
-#endif
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index dc863bdd28..ae352ce807 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -13,10 +13,6 @@
#include <usb_defs.h>
#include <asm/io.h>
-#ifdef CONFIG_USB_BLACKFIN
-# include "blackfin_usb.h"
-#endif
-
#define MUSB_EP0_FIFOSIZE 64 /* This is non-configurable */
/* EP0 */
@@ -336,28 +332,6 @@ extern void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt);
extern void write_fifo(u8 ep, u32 length, void *fifo_data);
extern void read_fifo(u8 ep, u32 length, void *fifo_data);
-#if defined(CONFIG_USB_BLACKFIN)
-/* Every USB register is accessed as a 16-bit even if the value itself
- * is only 8-bits in size. Fun stuff.
- */
-# undef readb
-# define readb(addr) (u8)bfin_read16(addr)
-# undef writeb
-# define writeb(b, addr) bfin_write16(addr, b)
-# undef MUSB_TXCSR_MODE /* not supported */
-# define MUSB_TXCSR_MODE 0
-/*
- * The USB PHY on current Blackfin processors is a UTMI+ level 2 PHY.
- * However, it has no ULPI support - so there are no registers at all.
- * That means accesses to ULPI_BUSCONTROL have to be abstracted away.
- */
-static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)
-{
- return 0;
-}
-static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val)
-{}
-#else
static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)
{
return readb(&musbr->ulpi_busctl);
@@ -366,6 +340,5 @@ static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val)
{
writeb(val, &musbr->ulpi_busctl);
}
-#endif
#endif /* __MUSB_HDRC_DEFS_H__ */
diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c
index 49479368d2..fee0848ade 100644
--- a/drivers/usb/musb/musb_hcd.c
+++ b/drivers/usb/musb/musb_hcd.c
@@ -913,11 +913,6 @@ int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
nextlen = ((len-txlen) < dev->epmaxpacketout[ep]) ?
(len-txlen) : dev->epmaxpacketout[ep];
-#ifdef CONFIG_USB_BLACKFIN
- /* Set the transfer data size */
- writew(nextlen, &musbr->txcount);
-#endif
-
/* Write the data to the FIFO */
write_fifo(MUSB_BULK_EP, nextlen,
(void *)(((u8 *)buffer) + txlen));