diff options
author | Simon Glass <sjg@chromium.org> | 2021-08-07 07:24:06 -0600 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2021-09-25 09:46:15 -0600 |
commit | dcfc42b12f95fecffbf4692854acd4193240d86a (patch) | |
tree | 0415ef0a2804ac9dff88bc8ecfd28cd39a740de2 /drivers/spi | |
parent | 62470afed14a598d36d055c60ccc3ffab6967dcc (diff) |
treewide: Try to avoid the preprocessor with OF_REAL
Convert some of these occurences to C code, where it is easy to do. This
should help encourage this approach to be used in new code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r-- | drivers/spi/rk_spi.c | 36 | ||||
-rw-r--r-- | drivers/spi/spi-uclass.c | 8 |
2 files changed, 22 insertions, 22 deletions
diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c index e504e306fd7..8309a5301f2 100644 --- a/drivers/spi/rk_spi.c +++ b/drivers/spi/rk_spi.c @@ -193,31 +193,31 @@ static int conv_of_plat(struct udevice *dev) static int rockchip_spi_of_to_plat(struct udevice *bus) { -#if CONFIG_IS_ENABLED(OF_REAL) struct rockchip_spi_plat *plat = dev_get_plat(bus); struct rockchip_spi_priv *priv = dev_get_priv(bus); int ret; - plat->base = dev_read_addr(bus); + if (CONFIG_IS_ENABLED(OF_REAL)) { + plat->base = dev_read_addr(bus); - ret = clk_get_by_index(bus, 0, &priv->clk); - if (ret < 0) { - debug("%s: Could not get clock for %s: %d\n", __func__, - bus->name, ret); - return ret; - } + ret = clk_get_by_index(bus, 0, &priv->clk); + if (ret < 0) { + debug("%s: Could not get clock for %s: %d\n", __func__, + bus->name, ret); + return ret; + } - plat->frequency = - dev_read_u32_default(bus, "spi-max-frequency", 50000000); - plat->deactivate_delay_us = - dev_read_u32_default(bus, "spi-deactivate-delay", 0); - plat->activate_delay_us = - dev_read_u32_default(bus, "spi-activate-delay", 0); + plat->frequency = dev_read_u32_default(bus, "spi-max-frequency", + 50000000); + plat->deactivate_delay_us = + dev_read_u32_default(bus, "spi-deactivate-delay", 0); + plat->activate_delay_us = + dev_read_u32_default(bus, "spi-activate-delay", 0); - debug("%s: base=%x, max-frequency=%d, deactivate_delay=%d\n", - __func__, (uint)plat->base, plat->frequency, - plat->deactivate_delay_us); -#endif + debug("%s: base=%x, max-frequency=%d, deactivate_delay=%d\n", + __func__, (uint)plat->base, plat->frequency, + plat->deactivate_delay_us); + } return 0; } diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c index 655fb1407aa..f8ec312d715 100644 --- a/drivers/spi/spi-uclass.c +++ b/drivers/spi/spi-uclass.c @@ -176,11 +176,11 @@ static int spi_child_post_bind(struct udevice *dev) static int spi_post_probe(struct udevice *bus) { -#if CONFIG_IS_ENABLED(OF_REAL) - struct dm_spi_bus *spi = dev_get_uclass_priv(bus); + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct dm_spi_bus *spi = dev_get_uclass_priv(bus); - spi->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0); -#endif + spi->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0); + } #if defined(CONFIG_NEEDS_MANUAL_RELOC) struct dm_spi_ops *ops = spi_get_ops(bus); static int reloc_done; |