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authorJagan Teki <jteki@openedev.com>2016-08-08 17:12:12 +0530
committerJagan Teki <jagannadh.teki@gmail.com>2016-09-22 01:02:28 +0530
commit08fe9c294f2d699a4e8b6b18e31169a89552f967 (patch)
tree43fa8d209a81be053746f45a334f75c5c884808f /drivers/spi
parentb3afb232f7853d078ae0f533a7af70e0b047fe18 (diff)
spi: Use mode for rx mode flags
Make rx mode flags as generic to spi, earlier mode_rx is maintained separately because of some flash specific code. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/cadence_qspi.c2
-rw-r--r--drivers/spi/ich.c6
-rw-r--r--drivers/spi/spi-uclass.c11
-rw-r--r--drivers/spi/ti_qspi.c6
4 files changed, 10 insertions, 15 deletions
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index a5244fff4d..1d50f135c9 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -251,7 +251,7 @@ static int cadence_spi_xfer(struct udevice *dev, unsigned int bitlen,
break;
case CQSPI_INDIRECT_READ:
err = cadence_qspi_apb_indirect_read_setup(plat,
- priv->cmd_len, dm_plat->mode_rx, cmd_buf);
+ priv->cmd_len, dm_plat->mode, cmd_buf);
if (!err) {
err = cadence_qspi_apb_indirect_read_execute
(plat, data_bytes, din);
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 00b2fed7b7..caf0103dc3 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -649,10 +649,8 @@ static int ich_spi_child_pre_probe(struct udevice *dev)
* ICH 7 SPI controller only supports array read command
* and byte program command for SST flash
*/
- if (plat->ich_version == ICHV_7) {
- slave->mode_rx = SPI_RX_SLOW;
- slave->mode = SPI_TX_BYTE;
- }
+ if (plat->ich_version == ICHV_7)
+ slave->mode = SPI_RX_SLOW | SPI_TX_BYTE;
return 0;
}
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 247abfa72b..d9c49e4e8c 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -164,7 +164,6 @@ static int spi_child_pre_probe(struct udevice *dev)
slave->max_hz = plat->max_hz;
slave->mode = plat->mode;
- slave->mode_rx = plat->mode_rx;
slave->wordlen = SPI_DEFAULT_WORDLEN;
return 0;
@@ -381,7 +380,7 @@ void spi_free_slave(struct spi_slave *slave)
int spi_slave_ofdata_to_platdata(const void *blob, int node,
struct dm_spi_slave_platdata *plat)
{
- int mode = 0, mode_rx = 0;
+ int mode = 0;
int value;
plat->cs = fdtdec_get_int(blob, node, "reg", -1);
@@ -413,24 +412,22 @@ int spi_slave_ofdata_to_platdata(const void *blob, int node,
break;
}
- plat->mode = mode;
-
value = fdtdec_get_uint(blob, node, "spi-rx-bus-width", 1);
switch (value) {
case 1:
break;
case 2:
- mode_rx |= SPI_RX_DUAL;
+ mode |= SPI_RX_DUAL;
break;
case 4:
- mode_rx |= SPI_RX_QUAD;
+ mode |= SPI_RX_QUAD;
break;
default:
error("spi-rx-bus-width %d not supported\n", value);
break;
}
- plat->mode_rx = mode_rx;
+ plat->mode = mode;
return 0;
}
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index 406e76b8a7..52520dff63 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -356,7 +356,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_priv *priv)
QSPI_SETUP0_NUM_D_BYTES_8_BITS |
QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE |
QSPI_NUM_DUMMY_BITS);
- slave->mode_rx = SPI_RX_QUAD;
+ slave->mode |= SPI_RX_QUAD;
#else
memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES |
QSPI_SETUP0_NUM_D_BYTES_NO_BITS |
@@ -442,7 +442,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv,
bool enable)
{
u32 memval;
- u32 mode = slave->mode_rx & (SPI_RX_QUAD | SPI_RX_DUAL);
+ u32 mode = slave->mode & (SPI_RX_QUAD | SPI_RX_DUAL);
if (!enable) {
writel(0, &priv->base->setup0);
@@ -456,7 +456,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv,
memval |= QSPI_CMD_READ_QUAD;
memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS;
memval |= QSPI_SETUP0_READ_QUAD;
- slave->mode_rx = SPI_RX_QUAD;
+ slave->mode |= SPI_RX_QUAD;
break;
case SPI_RX_DUAL:
memval |= QSPI_CMD_READ_DUAL;